Commit message (Collapse) | Author | Age | Files | Lines | ||
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* | Add support for Hexagon Architectural feature, New Value Jump. | Sirish Pande | 2012-04-13 | 1 | -3/+23 | |
| | | | | llvm-svn: 154696 | |||||
* | Silence various build warnings from Hexagon backend that show up in release ↵ | Craig Topper | 2012-04-13 | 1 | -207/+203 | |
| | | | | | | builds. Mostly converting 'assert(0)' to 'llvm_unreachable' to silence warnings about missing returns. Also fold some variable declarations into asserts to prevent the variables from being unused in release builds. llvm-svn: 154660 | |||||
* | HexagonPacketizer patch. | Sirish Pande | 2012-04-12 | 1 | -2/+1011 | |
| | | | | llvm-svn: 154616 | |||||
* | Hexagon: enable assembler output through the MC layer. | Evandro Menezes | 2012-04-12 | 1 | -1/+1 | |
| | | | | llvm-svn: 154597 | |||||
* | Reorder includes in Target backends to following coding standards. Remove ↵ | Craig Topper | 2012-03-17 | 1 | -1/+1 | |
| | | | | | | some superfluous forward declarations. llvm-svn: 152997 | |||||
* | Efficient pattern for store truncate. Patch by Evandro Menezes. | Sirish Pande | 2012-02-22 | 1 | -1/+0 | |
| | | | | llvm-svn: 151166 | |||||
* | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, ↵ | Jia Liu | 2012-02-18 | 1 | -1/+1 | |
| | | | | | | MSP430, PPC, PTX, Sparc, X86, XCore. llvm-svn: 150878 | |||||
* | Optimize redundant sign extends and negation of predicates. | Sirish Pande | 2012-02-15 | 1 | -16/+472 | |
| | | | | llvm-svn: 150606 | |||||
* | Revert "Optimize redundant sign extends and negation of predicates" | Eric Christopher | 2012-02-15 | 1 | -472/+16 | |
| | | | | | | | | as it's breaking the build. This reverts commit 11241abca5e2a313412fed594bb9d9fa2a2057fb. llvm-svn: 150604 | |||||
* | Optimize redundant sign extends and negation of predicates | Sirish Pande | 2012-02-15 | 1 | -16/+472 | |
| | | | | llvm-svn: 150601 | |||||
* | Use TSFlag bit to describe instruction properties. | Brendon Cahoon | 2012-02-08 | 1 | -206/+2 | |
| | | | | | | | | Creating the isPredicated TSFlag enables the code to use the property defined in the instruction format instead of using a large switch statement. llvm-svn: 150078 | |||||
* | Convert assert(0) to llvm_unreachable | Craig Topper | 2012-02-07 | 1 | -9/+6 | |
| | | | | llvm-svn: 149961 | |||||
* | Hexagon: Remove forbidden iostream includes (it introduces static initializers) | Benjamin Kramer | 2012-02-06 | 1 | -6/+3 | |
| | | | | | | Reorder includes while at it. llvm-svn: 149863 | |||||
* | VLIW specific scheduler framework that utilizes deterministic finite ↵ | Andrew Trick | 2012-02-01 | 1 | -0/+30 | |
| | | | | | | | | | | automaton (DFA). This new scheduler plugs into the existing selection DAG scheduling framework. It is a top-down critical path scheduler that tracks register pressure and uses a DFA for pipeline modeling. Patch by Sergei Larin! llvm-svn: 149547 | |||||
* | More dead code removal (using -Wunreachable-code) | David Blaikie | 2012-01-20 | 1 | -2/+0 | |
| | | | | llvm-svn: 148578 | |||||
* | Clean up some Release build warnings. | Benjamin Kramer | 2011-12-27 | 1 | -9/+4 | |
| | | | | llvm-svn: 147289 | |||||
* | Add MCTargetDesc library to Hexagon target | Tony Linthicum | 2011-12-15 | 1 | -1/+0 | |
| | | | | llvm-svn: 146692 | |||||
* | Hexagon backend support | Tony Linthicum | 2011-12-12 | 1 | -0/+1460 | |
llvm-svn: 146412 |