| Commit message (Expand) | Author | Age | Files | Lines |
| * | [Hexagon] Convert HVX vector constants of i1 to i8 | Krzysztof Parzyszek | 2017-08-01 | 1 | -0/+36 |
| * | TargetLowering: Change isShuffleMaskLegal's mask argument type to ArrayRef<in... | Zvi Rackover | 2017-07-26 | 1 | -2/+2 |
| * | [Hexagon] Add inline-asm constraint 'a' for modifier register class | Krzysztof Parzyszek | 2017-07-21 | 1 | -2/+10 |
| * | [SystemZ, LoopStrengthReduce] | Jonas Paulsson | 2017-07-21 | 1 | -1/+1 |
| * | [Hexagon] Remove custom lowering of loads of v4i16 | Krzysztof Parzyszek | 2017-07-17 | 1 | -82/+1 |
| * | [Hexagon] Replace ISD opcode VPACK with VPACKE/VPACKO, NFC | Krzysztof Parzyszek | 2017-07-14 | 1 | -11/+9 |
| * | [Hexagon] Use VSPLAT instead of COMBINE for vectors of type v2i32, NFC | Krzysztof Parzyszek | 2017-07-13 | 1 | -23/+21 |
| * | [Hexagon] Do not rely on callee-saved info in hasFP | Krzysztof Parzyszek | 2017-07-11 | 1 | -2/+7 |
| * | [Hexagon] Convert typed ISD opcodes to generic ones, NFC | Krzysztof Parzyszek | 2017-07-10 | 1 | -19/+13 |
| * | [Hexagon] Remove unused ISD opcodes, NFC | Krzysztof Parzyszek | 2017-07-10 | 1 | -15/+0 |
| * | [Hexagon] Implement frame pointer elimination with -fomit-frame-pointer | Krzysztof Parzyszek | 2017-06-30 | 1 | -41/+36 |
| * | Sort the remaining #include lines in include/... and lib/.... | Chandler Carruth | 2017-06-06 | 1 | -2/+2 |
| * | [Hexagon] Improve code generation for 32x32-bit multiplication | Krzysztof Parzyszek | 2017-05-30 | 1 | -5/+1 |
| * | [SelectionDAG] Set ISD::FPOWI to Expand by default | Craig Topper | 2017-05-30 | 1 | -1/+1 |
| * | Add extra operand to CALLSEQ_START to keep frame part set up previously | Serge Pavlov | 2017-05-09 | 1 | -2/+1 |
| * | [Hexagon] Add extenders for GD_PLT_B22_PCREL and LD_PLT_B22_PCREL | Krzysztof Parzyszek | 2017-05-02 | 1 | -1/+6 |
| * | DAG: Make mayBeEmittedAsTailCall parameter const | Matt Arsenault | 2017-04-18 | 1 | -1/+1 |
| * | [Hexagon] Implement HexagonTargetLowering::CanLowerReturn | Krzysztof Parzyszek | 2017-04-13 | 1 | -12/+13 |
| * | [Hexagon] Fix "LowerFormalArguments emitted a value with the wrong type!" ass... | Krzysztof Parzyszek | 2017-04-13 | 1 | -1/+1 |
| * | [Hexagon] Properly handle 'q' constraint in 128-byte vector mode | Krzysztof Parzyszek | 2017-03-02 | 1 | -22/+10 |
| * | [Hexagon] Fix lowering of formal arguments of type i1 | Krzysztof Parzyszek | 2017-03-01 | 1 | -3/+20 |
| * | [Hexagon] Patterns for CTPOP, BSWAP and BITREVERSE | Krzysztof Parzyszek | 2017-02-23 | 1 | -15/+7 |
| * | [Hexagon] Implement @llvm.readcyclecounter() | Krzysztof Parzyszek | 2017-02-22 | 1 | -0/+15 |
| * | [Hexagon] Start using regmasks on calls | Krzysztof Parzyszek | 2017-02-17 | 1 | -22/+29 |
| * | Revert "[Hexagon] Start using regmasks on calls" | Rafael Espindola | 2017-02-17 | 1 | -29/+22 |
| * | [Hexagon] Start using regmasks on calls | Krzysztof Parzyszek | 2017-02-16 | 1 | -22/+29 |
| * | [Hexagon] Fix some Clang-tidy modernize and Include What You Use warnings; ot... | Eugene Zelenko | 2016-12-17 | 1 | -21/+32 |
| * | [Hexagon] Separate Hexagon subreg indices for different register classes | Krzysztof Parzyszek | 2016-11-09 | 1 | -12/+10 |
| * | [Hexagon] Relocate pattern-related bits to proper places | Krzysztof Parzyszek | 2016-11-05 | 1 | -14/+0 |
| * | [Hexagon] Do not expand ISD::SELECT for HVX vectors | Krzysztof Parzyszek | 2016-10-27 | 1 | -4/+7 |
| * | Target: Change various section classifiers in TargetLoweringObjectFile to tak... | Peter Collingbourne | 2016-10-24 | 1 | -1/+2 |
| * | Use __func__ directly now that all supported compilers support it | Reid Kleckner | 2016-10-20 | 1 | -1/+1 |
| * | getVectorElementType().getSizeInBits() -> getScalarSizeInBits() ; NFCI | Sanjay Patel | 2016-09-14 | 1 | -1/+1 |
| * | getValueType().getSizeInBits() -> getValueSizeInBits() ; NFCI | Sanjay Patel | 2016-09-14 | 1 | -4/+3 |
| * | [Hexagon] Better handling of HVX vector lowering | Krzysztof Parzyszek | 2016-09-13 | 1 | -4/+14 |
| * | [Hexagon] Expand sext- and zextloads of vector types, not just extloads | Krzysztof Parzyszek | 2016-09-08 | 1 | -1/+5 |
| * | [Hexagon] Fix subesthetic indentation | Krzysztof Parzyszek | 2016-08-19 | 1 | -46/+45 |
| * | [Hexagon] Allow i1 values for 'r' constraint in inline-asm | Krzysztof Parzyszek | 2016-08-19 | 1 | -2/+3 |
| * | [Hexagon] Do not cache alloca instructions during isel | Krzysztof Parzyszek | 2016-08-19 | 1 | -14/+0 |
| * | [Hexagon] Allow tail-call optimization when mixing C and fast calling conv | Krzysztof Parzyszek | 2016-08-19 | 1 | -3/+9 |
| * | [Hexagon] Improvements to handling and generation of FP instructions | Krzysztof Parzyszek | 2016-08-19 | 1 | -0/+7 |
| * | [SelectionDAG] Rename fextend -> fpextend, fround -> fpround, frnd -> fround | Michael Kuperstein | 2016-08-18 | 1 | -1/+1 |
| * | [Hexagon] Standardize next batch of pseudo instructions | Krzysztof Parzyszek | 2016-08-16 | 1 | -1/+1 |
| * | Fix unsupported relocation type R_HEX_6_X' for symbol .rodata | Ron Lieberman | 2016-08-13 | 1 | -2/+9 |
| * | [Hexagon] Standardize pseudo-instructions for calls and returns | Krzysztof Parzyszek | 2016-08-12 | 1 | -5/+5 |
| * | [Hexagon] Remove unneeded/unused ISD opcodes ARGEXTEND and FCONST32 | Krzysztof Parzyszek | 2016-08-10 | 1 | -2/+0 |
| * | [Hexagon] Add pattern for 64-bit mulhs | Krzysztof Parzyszek | 2016-08-08 | 1 | -1/+0 |
| * | [Hexagon] Do not check alignment for unsized types in isLegalAddressingMode | Krzysztof Parzyszek | 2016-08-03 | 1 | -7/+16 |
| * | [Hexagon] Improvements to address mode checks in TargetLowering | Krzysztof Parzyszek | 2016-08-02 | 1 | -2/+35 |
| * | [Hexagon] Tidy up some code, NFC: reapply r277372 with a fix | Krzysztof Parzyszek | 2016-08-01 | 1 | -96/+101 |