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path: root/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp
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* [Hexagon] Handle more types of immediate operands in expand-condsetsKrzysztof Parzyszek2017-06-211-2/+13
| | | | llvm-svn: 305943
* Move size and alignment information of regclass to TargetRegisterInfoKrzysztof Parzyszek2017-04-241-3/+3
| | | | | | | | | | | | | | | 1. RegisterClass::getSize() is split into two functions: - TargetRegisterInfo::getRegSizeInBits(const TargetRegisterClass &RC) const; - TargetRegisterInfo::getSpillSize(const TargetRegisterClass &RC) const; 2. RegisterClass::getAlignment() is replaced by: - TargetRegisterInfo::getSpillAlignment(const TargetRegisterClass &RC) const; This will allow making those values depend on subtarget features in the future. Differential Revision: https://reviews.llvm.org/D31783 llvm-svn: 301221
* [Hexagon] Mark dead defs as <dead> in expand-condsetsKrzysztof Parzyszek2017-03-061-12/+28
| | | | | | | | | The code in updateDeadFlags removed unnecessary <dead> flags, but there can be cases where such a flag is not set, and yet a register has become dead. For example, if a mux with identical inputs is replaced with a COPY, the predicate register may no longer be used after that. llvm-svn: 297032
* [CodeGen] Rename MachineInstrBuilder::addOperand. NFCDiana Picus2017-01-131-4/+4
| | | | | | | | | | | Rename from addOperand to just add, to match the other method that has been added to MachineInstrBuilder for adding more than just 1 operand. See https://reviews.llvm.org/D28057 for the whole discussion. Differential Revision: https://reviews.llvm.org/D28556 llvm-svn: 291891
* Implement LaneBitmask::any(), use it to replace !none(), NFCIKrzysztof Parzyszek2016-12-161-1/+1
| | | | llvm-svn: 289974
* Extract LaneBitmask into a separate typeKrzysztof Parzyszek2016-12-151-1/+1
| | | | | | | | | | | | Specifically avoid implicit conversions from/to integral types to avoid potential errors when changing the underlying type. For example, a typical initialization of a "full" mask was "LaneMask = ~0u", which would result in a value of 0x00000000FFFFFFFF if the type was extended to uint64_t. Differential Revision: https://reviews.llvm.org/D27454 llvm-svn: 289820
* [Hexagon] Fix some Clang-tidy modernize and Include What You Use warnings; ↵Eugene Zelenko2016-12-141-41/+35
| | | | | | other minor fixes (NFC). llvm-svn: 289736
* Fix spelling mistakes in Hexagon target comments. NFC.Simon Pilgrim2016-11-171-1/+1
| | | | | | Identified by Pedro Giffuni in PR27636. llvm-svn: 287248
* [Hexagon] Separate Hexagon subreg indices for different register classesKrzysztof Parzyszek2016-11-091-2/+4
| | | | | | | | | | | For pairs of 32-bit registers: isub_lo, isub_hi. For pairs of vector registers: vsub_lo, vsub_hi. Add generic subreg indices: ps_sub_lo, ps_sub_hi, and a function HexagonRegisterInfo::getHexagonSubRegIndex(RegClass, GenericSubreg) that returns the appropriate subreg index for RegClass. llvm-svn: 286377
* [Hexagon] Account for <def,read-undef> when validating moves for predicationKrzysztof Parzyszek2016-11-041-0/+7
| | | | llvm-svn: 286009
* [Hexagon] Remove registers coalesced in expand-condsets from live intervalsKrzysztof Parzyszek2016-11-021-0/+3
| | | | llvm-svn: 285846
* [llvm] FIx if-clause -Wmisleading-indentation issue.Kirill Bobyrev2016-11-021-1/+2
| | | | | | | | | | | | | | | | | | | | | | While bootstrapping Clang with recent `gcc 6.2.0` I found a bug related to misleading indentation. I believe, a pair of `{}` was forgotten, especially given the above similar piece of code: ``` if (!RDef || !HII->isPredicable(*RDef)) { Done = coalesceRegisters(RD, RegisterRef(S1)); if (Done) { UpdRegs.insert(RD.Reg); UpdRegs.insert(S1.getReg()); } } ``` Reviewers: kparzysz Differential Revision: https://reviews.llvm.org/D26204 llvm-svn: 285794
* [Hexagon] Garbage collect dead code.Davide Italiano2016-10-311-17/+0
| | | | llvm-svn: 285654
* [Hexagon] Don't expand mux instructions with both sources identicalKrzysztof Parzyszek2016-10-311-2/+20
| | | | llvm-svn: 285588
* [Hexagon] Maintain kill flags through splitting in expand-condsetsKrzysztof Parzyszek2016-10-281-40/+96
| | | | | | | Do not use LiveIntervals to recalculate kills, because that cannot be done accurately without implicit uses on predicated instructions. llvm-svn: 285409
* Use StringRef in Pass/PassManager APIs (NFC)Mehdi Amini2016-10-011-3/+1
| | | | llvm-svn: 283004
* [Hexagon] Deal with undefs when extending live intervalsKrzysztof Parzyszek2016-09-011-1/+1
| | | | | | Reapply r280275, since MSVC accepts r280358. llvm-svn: 280369
* Revert "Add an optional parameter with a list of undefs to extendToIndices"Reid Kleckner2016-08-311-1/+1
| | | | | | | | | | | | This reverts commit r280268, it causes all MSVC 2013 to ICE. This appears to have been fixed in a later MSVC 2013 update, because I cannot reproduce it locally. That said, all upstream LLVM bots are broken right now, so I am reverting. Also reverts dependent change r280275, "[Hexagon] Deal with undefs when extending live intervals". llvm-svn: 280301
* [Hexagon] Deal with undefs when extending live intervalsKrzysztof Parzyszek2016-08-311-1/+1
| | | | llvm-svn: 280275
* [Hexagon] Change insertion of expand-condsets pass to avoid memory leaksKrzysztof Parzyszek2016-08-241-0/+4
| | | | llvm-svn: 279678
* [Hexagon] Remove the utilization of IMPLICIT_DEFs from expand-condsetsKrzysztof Parzyszek2016-08-241-104/+1
| | | | | | | This is no longer necessary, because since r279625 the subregister liveness properly accounts for read-undefs. llvm-svn: 279637
* Create subranges for new intervals resulting from live interval splittingKrzysztof Parzyszek2016-08-241-1/+7
| | | | | | | | | | | | | | | | | | | The register allocator can split a live interval of a register into a set of smaller intervals. After the allocation of registers is complete, the rewriter will modify the IR to replace virtual registers with the corres- ponding physical registers. At this stage, if a register corresponding to a subregister of a virtual register is used, the rewriter will check if that subregister is undefined, and if so, it will add the <undef> flag to the machine operand. The function verifying liveness of the subregis- ter would assume that it is undefined, unless any of the subranges of the live interval proves otherwise. The problem is that the live intervals created during splitting do not have any subranges, even if the original parent interval did. This could result in the <undef> flag placed on a register that is actually defined. Differential Revision: http://reviews.llvm.org/D21189 llvm-svn: 279625
* [Hexagon] Check for empty live intervalKrzysztof Parzyszek2016-08-191-0/+2
| | | | | | Patch by Brendon Cahoon. llvm-svn: 279249
* Use the range variant of remove_if instead of unpacking begin/endDavid Majnemer2016-08-121-2/+1
| | | | | | No functionality change is intended. llvm-svn: 278475
* [Hexagon] Standardize "select" pseudo-instructionsKrzysztof Parzyszek2016-08-111-1/+1
| | | | | | | | - PS_pselect: general register pairs - PS_vselect: vector registers (+ 128B version) - PS_wselect: vector register pairs (+ 128B version) llvm-svn: 278390
* Hexagon: Avoid implicit iterator conversions, NFCDuncan P. N. Exon Smith2016-07-121-66/+66
| | | | | | | | | | | | | | Avoid implicit iterator conversions from MachineInstrBundleIterator to MachineInstr* in the Hexagon backend, mostly by preferring MachineInstr& over MachineInstr* and switching to range-based for loops. There's a long tail of API cleanup here, but I'm planning to leave the rest to the Hexagon maintainers. HexagonInstrInfo defines many of its own predicates, and most of them still take MachineInstr*. Some of those actually check for nullptr, so I didn't feel comfortable changing them to MachineInstr& en masse. llvm-svn: 275142
* [Hexagon] Revert r274381: that was actually wrongKrzysztof Parzyszek2016-07-011-1/+1
| | | | llvm-svn: 274384
* [Hexagon] Use MachineOperand::readsReg instead of isUseKrzysztof Parzyszek2016-07-011-1/+1
| | | | llvm-svn: 274381
* CodeGen: Use MachineInstr& in TargetInstrInfo, NFCDuncan P. N. Exon Smith2016-06-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is mostly a mechanical change to make TargetInstrInfo API take MachineInstr& (instead of MachineInstr* or MachineBasicBlock::iterator) when the argument is expected to be a valid MachineInstr. This is a general API improvement. Although it would be possible to do this one function at a time, that would demand a quadratic amount of churn since many of these functions call each other. Instead I've done everything as a block and just updated what was necessary. This is mostly mechanical fixes: adding and removing `*` and `&` operators. The only non-mechanical change is to split ARMBaseInstrInfo::getOperandLatencyImpl out from ARMBaseInstrInfo::getOperandLatency. Previously, the latter took a `MachineInstr*` which it updated to the instruction bundle leader; now, the latter calls the former either with the same `MachineInstr&` or the bundle leader. As a side effect, this removes a bunch of MachineInstr* to MachineBasicBlock::iterator implicit conversions, a necessary step toward fixing PR26753. Note: I updated WebAssembly, Lanai, and AVR (despite being off-by-default) since it turned out to be easy. I couldn't run tests for AVR since llc doesn't link with it turned on. llvm-svn: 274189
* Run clang-tidy's performance-unnecessary-copy-initialization over LLVM.Benjamin Kramer2016-06-121-1/+1
| | | | | | No functionality change intended. llvm-svn: 272516
* [Hexagon] Modify HexagonExpandCondsets to handle subregistersKrzysztof Parzyszek2016-06-081-507/+454
| | | | | | | | | Also, switch to using functions from LiveIntervalAnalysis to update live intervals, instead of performing the updates manually. Re-committing r272045. llvm-svn: 272135
* Revert r272045 since GCC doesn't know how to compile it.Krzysztof Parzyszek2016-06-071-449/+507
| | | | llvm-svn: 272048
* [Hexagon] Modify HexagonExpandCondsets to handle subregistersKrzysztof Parzyszek2016-06-071-507/+449
| | | | | | | Also, switch to using functions from LiveIntervalAnalysis to update live intervals, instead of performing the updates manually. llvm-svn: 272045
* [Hexagon] Disable expanding MUX instructions that define a subregisterKrzysztof Parzyszek2016-05-311-0/+5
| | | | | | | The code in HexagonExpandCondsets.cpp does not handle those cases at the moment. llvm-svn: 271281
* [Hexagon] Use standard macros to initialize HexagonExpandCondsets passKrzysztof Parzyszek2016-05-271-12/+7
| | | | llvm-svn: 271045
* Add optimization bisect opt-in calls for Hexagon passesAndrew Kaylor2016-04-261-0/+3
| | | | | | Differential Revision: http://reviews.llvm.org/D19509 llvm-svn: 267593
* [Hexagon] Teach mux expansion how to deal with undef predicatesKrzysztof Parzyszek2016-04-221-5/+13
| | | | llvm-svn: 267165
* CodeGen: Take MachineInstr& in SlotIndexes and LiveIntervals, NFCDuncan P. N. Exon Smith2016-02-271-5/+5
| | | | | | | | | | | | | | Take MachineInstr by reference instead of by pointer in SlotIndexes and the SlotIndex wrappers in LiveIntervals. The MachineInstrs here are never null, so this cleans up the API a bit. It also incidentally removes a few implicit conversions from MachineInstrBundleIterator to MachineInstr* (see PR26753). At a couple of call sites it was convenient to convert to a range-based for loop over MachineBasicBlock::instr_begin/instr_end, so I added MachineBasicBlock::instrs. llvm-svn: 262115
* CodeGen: TII: Take MachineInstr& in predicate API, NFCDuncan P. N. Exon Smith2016-02-231-14/+12
| | | | | | | | | | | | | Change TargetInstrInfo API to take `MachineInstr&` instead of `MachineInstr*` in the functions related to predicated instructions (I'll try to come back later and get some of the rest). All of these functions require non-null parameters already, so references are more clear. As a bonus, this happens to factor away a host of implicit iterator => pointer conversions. No functionality change intended. llvm-svn: 261605
* [Hexagon] Add missing preamble to a source fileKrzysztof Parzyszek2015-07-091-0/+9
| | | | llvm-svn: 241813
* Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)Alexander Kornienko2015-06-231-1/+1
| | | | | | Apparently, the style needs to be agreed upon first. llvm-svn: 240390
* Fixed/added namespace ending comments using clang-tidy. NFCAlexander Kornienko2015-06-191-1/+1
| | | | | | | | | | | | | The patch is generated using this command: tools/clang/tools/extra/clang-tidy/tool/run-clang-tidy.py -fix \ -checks=-*,llvm-namespace-comment -header-filter='llvm/.*|clang/.*' \ llvm/lib/ Thanks to Eugene Kosov for the original patch! llvm-svn: 240137
* [Hexagon] Avoid an unused variable warning when assertions are offSimon Atanasyan2015-03-311-0/+1
| | | | | | No functional changes. llvm-svn: 233740
* Expand MUX instructions early on HexagonKrzysztof Parzyszek2015-03-311-0/+1347
This time with all files included. llvm-svn: 233696
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