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path: root/llvm/lib/Target/Hexagon/HexagonCFGOptimizer.cpp
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* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-1/+1
| | | | | | information and update all callers. No functional change. llvm-svn: 214781
* [C++11] Add 'override' keywords and remove 'virtual'. Additionally add ↵Craig Topper2014-04-291-2/+2
| | | | | | 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Hexagon edition llvm-svn: 207508
* [C++] Use 'nullptr'. Target edition.Craig Topper2014-04-251-4/+4
| | | | llvm-svn: 207197
* [Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-221-1/+2
| | | | | | | definition below all of the header #include lines, lib/Target/... edition. llvm-svn: 206842
* Print IR from Hexagon MI passes with -print-before/after-all.Krzysztof Parzyszek2013-05-061-1/+18
| | | | llvm-svn: 181255
* Make references to HexagonTargetMachine "const".Krzysztof Parzyszek2013-05-061-5/+4
| | | | llvm-svn: 181233
* Hexagon: Use multiclass for Jump instructions.Jyotsna Verma2013-05-011-12/+12
| | | | llvm-svn: 180885
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-5/+6
| | | | | | | | | | | | | | | | | Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] llvm-svn: 169131
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, ↵Jia Liu2012-02-181-1/+1
| | | | | | MSP430, PPC, PTX, Sparc, X86, XCore. llvm-svn: 150878
* Optimize redundant sign extends and negation of predicates.Sirish Pande2012-02-151-12/+12
| | | | llvm-svn: 150606
* Revert "Optimize redundant sign extends and negation of predicates"Eric Christopher2012-02-151-12/+12
| | | | | | | | as it's breaking the build. This reverts commit 11241abca5e2a313412fed594bb9d9fa2a2057fb. llvm-svn: 150604
* Optimize redundant sign extends and negation of predicatesSirish Pande2012-02-151-12/+12
| | | | llvm-svn: 150601
* Convert assert(0) to llvm_unreachableCraig Topper2012-02-071-1/+1
| | | | llvm-svn: 149961
* Hexagon: Remove forbidden iostream includes (it introduces static initializers)Benjamin Kramer2012-02-061-10/+5
| | | | | | Reorder includes while at it. llvm-svn: 149863
* Hexagon backend supportTony Linthicum2011-12-121-0/+240
llvm-svn: 146412
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