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path: root/llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp
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* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-1/+1
| | | | | | | | All these headers already depend on CodeGen headers so moving them into CodeGen fixes the layering (since CodeGen depends on Target, not the other way around). llvm-svn: 318490
* [Hexagon] Fix some Clang-tidy modernize and Include What You Use warnings; ↵Eugene Zelenko2017-09-281-2/+3
| | | | | | other minor fixes (NFC). llvm-svn: 314467
* [Hexagon] Fix some Clang-tidy modernize-use-using and Include What You Use ↵Eugene Zelenko2017-07-261-1/+3
| | | | | | warnings; other minor fixes (NFC). llvm-svn: 309230
* [Hexagon] Fix a latent problem with interpreting live-in lane masksKrzysztof Parzyszek2017-04-141-5/+7
| | | | | | | A non-zero lane mask on a register with no subregister means that the whole register is live-in. It is equivalent to a full mask. llvm-svn: 300335
* [Hexagon] Defs and clobbers can overlapKrzysztof Parzyszek2017-02-271-5/+4
| | | | llvm-svn: 296365
* [Hexagon] Start using regmasks on callsKrzysztof Parzyszek2017-02-171-6/+57
| | | | | | Reapply r295371 with a fix for the Windows bot failures. llvm-svn: 295504
* Revert "[Hexagon] Start using regmasks on calls"Rafael Espindola2017-02-171-57/+6
| | | | | | | | | | This reverts commit r295371. It broke windows bots: http://bb.pgr.jp/builders/ninja-clang-i686-msc19-R/builds/11402/steps/test-llvm/logs/stdio llvm-svn: 295402
* [Hexagon] Start using regmasks on callsKrzysztof Parzyszek2017-02-161-6/+57
| | | | | | All the cool targets are doing it... llvm-svn: 295371
* Add iterator_range<regclass_iterator> to {Target,MC}RegisterInfo, NFCKrzysztof Parzyszek2017-01-251-2/+1
| | | | llvm-svn: 293077
* Implement LaneBitmask::any(), use it to replace !none(), NFCIKrzysztof Parzyszek2016-12-161-1/+1
| | | | llvm-svn: 289974
* Extract LaneBitmask into a separate typeKrzysztof Parzyszek2016-12-151-2/+2
| | | | | | | | | | | | Specifically avoid implicit conversions from/to integral types to avoid potential errors when changing the underlying type. For example, a typical initialization of a "full" mask was "LaneMask = ~0u", which would result in a value of 0x00000000FFFFFFFF if the type was extended to uint64_t. Differential Revision: https://reviews.llvm.org/D27454 llvm-svn: 289820
* [Hexagon] Fix some Clang-tidy modernize and Include What You Use warnings; ↵Eugene Zelenko2016-12-131-23/+7
| | | | | | other minor fixes (NFC). llvm-svn: 289604
* Use __func__ directly now that all supported compilers support itReid Kleckner2016-10-201-3/+3
| | | | | | Remove the portability macro now that it is unused. llvm-svn: 284681
* [Hexagon] Handle block live-ins with lane masks in HexagonBlockRangesKrzysztof Parzyszek2016-10-181-10/+26
| | | | llvm-svn: 284522
* Use the range variant of find/find_if instead of unpacking begin/endDavid Majnemer2016-08-121-1/+1
| | | | | | | | | If the result of the find is only used to compare against end(), just use is_contained instead. No functionality change is intended. llvm-svn: 278469
* [hexagon] Move BlockRanges and RDF stuff into the llvm namespace.Benjamin Kramer2016-05-271-10/+10
| | | | | | No functional change intended. llvm-svn: 270980
* [Hexagon] Properly close live range in HexagonBlockRangesKrzysztof Parzyszek2016-04-221-1/+1
| | | | llvm-svn: 267173
* [NFC] Header cleanupMehdi Amini2016-04-181-4/+2
| | | | | | | | | | | | | | Removed some unused headers, replaced some headers with forward class declarations. Found using simple scripts like this one: clear && ack --cpp -l '#include "llvm/ADT/IndexedMap.h"' | xargs grep -L 'IndexedMap[<]' | xargs grep -n --color=auto 'IndexedMap' Patch by Eugene Kosov <claprix@yandex.ru> Differential Revision: http://reviews.llvm.org/D19219 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 266595
* Fix Windows buildbot breakage.Alexey Samsonov2016-02-121-3/+4
| | | | llvm-svn: 260766
* [Hexagon] Optimize stack slot spillsKrzysztof Parzyszek2016-02-121-0/+484
Replace spills to memory with spills to registers, if possible. This applies mostly to predicate registers (both scalar and vector), since they are very limited in number. A spill of a predicate register may happen even if there is a general-purpose register available. In cases like this the stack spill/reload may be eliminated completely. This optimization will consider all stack objects, regardless of where they came from and try to match the live range of the stack slot with a dead range of a register from an appropriate register class. llvm-svn: 260758
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