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* Prune CRLFs.NAKAMURA Takumi2015-05-251-16/+16
| | | | llvm-svn: 238125
* MC: Modernize MCOperand API naming. NFC.Jim Grosbach2015-05-131-6/+6
| | | | | | MCOperand::Create*() methods renamed to MCOperand::create*(). llvm-svn: 237275
* [Hexagon] Moving remaining methods off of HexagonMCInst in to ↵Colin LeMahieu2015-02-191-2/+2
| | | | | | HexagonMCInstrInfo and eliminating HexagonMCInst class. llvm-svn: 229914
* [Hexagon] Adding vector load with post-increment instructions. Adding ↵Colin LeMahieu2015-02-101-0/+26
| | | | | | decoder function for 64bit control register class. llvm-svn: 228708
* [cleanup] Re-sort all the #include lines in LLVM usingChandler Carruth2015-01-141-5/+3
| | | | | | | | | | | utils/sort_includes.py. I clearly haven't done this in a while, so more changed than usual. This even uncovered a missing include from the InstrProf library that I've added. No functionality changed here, just mechanical cleanup of the include order. llvm-svn: 225974
* [Hexagon] Adding deallocframe and circular addressing loads.Colin LeMahieu2014-12-261-0/+19
| | | | llvm-svn: 224869
* [Hexagon] Adding transfers to and from control registers.Colin LeMahieu2014-12-191-0/+23
| | | | llvm-svn: 224599
* [Hexagon] Adding DoubleRegs decoder. Moving C2_mux and A2_nop. Adding ↵Colin LeMahieu2014-12-051-0/+24
| | | | | | combine imm-imm form. llvm-svn: 223494
* [Hexagon] Marking some instructions as CodeGenOnly=0 and adding disassembly ↵Colin LeMahieu2014-12-042-2/+5
| | | | | | tests. llvm-svn: 223334
* [Hexagon] Converting from ADD_rr to A2_add which has encoding bits.Colin LeMahieu2014-11-181-0/+34
| | | | | | Adding test to show correct instruction selection and encoding. llvm-svn: 222249
* Pass an ArrayRef to MCDisassembler::getInstruction.Rafael Espindola2014-11-121-5/+3
| | | | | | | | | | | | With this patch MCDisassembler::getInstruction takes an ArrayRef<uint8_t> instead of a MemoryObject. Even on X86 there is a maximum size an instruction can have. Given that, it seems way simpler and more efficient to just pass an ArrayRef to the disassembler instead of a MemoryObject and have it do a virtual call every time it wants some extra bytes. llvm-svn: 221751
* Misc style fixes. NFC.Rafael Espindola2014-11-101-5/+6
| | | | | | | | | | | | | This fixes a few cases of: * Wrong variable name style. * Lines longer than 80 columns. * Repeated names in comments. * clang-format of the above. This make the next patch a lot easier to read. llvm-svn: 221615
* [Hexagon] Reverting 220584 to address ASAN errors.Colin LeMahieu2014-11-041-34/+0
| | | | llvm-svn: 221210
* Prune CRLF.NAKAMURA Takumi2014-10-271-115/+115
| | | | llvm-svn: 220678
* [Hexagon] Resubmission of 220427Colin LeMahieu2014-10-241-0/+34
| | | | | | | | | | | Modified library structure to deal with circular dependency between HexagonInstPrinter and HexagonMCInst. Adding encoding bits for add opcode. Adding llvm-mc tests. Removing unit tests. http://reviews.llvm.org/D5624 llvm-svn: 220584
* Hexagon/Disassembler/LLVMBuild.txt: Update libdeps.NAKAMURA Takumi2014-10-231-1/+1
| | | | llvm-svn: 220482
* Hexagon/LLVMBuild.txt: Prune CRLF.NAKAMURA Takumi2014-10-231-23/+23
| | | | llvm-svn: 220481
* [CMake] Prune CRLF in CMakeLists.txt(s).NAKAMURA Takumi2014-10-231-3/+3
| | | | llvm-svn: 220480
* Revert r220427, "[Hexagon] Adding encoding bits for add opcode."NAKAMURA Takumi2014-10-231-34/+0
| | | | | | It brought cyclic dependecy between HexagonAsmPrinter and HexagonDesc. llvm-svn: 220478
* [Hexagon] Adding encoding bits for add opcode.Colin LeMahieu2014-10-221-0/+34
| | | | | | | | | Adding llvm-mc tests. Removing unit tests. http://reviews.llvm.org/D5624 llvm-svn: 220427
* Fix VS2012 build; C++11 type aliases are not supported.Hans Wennborg2014-10-221-1/+2
| | | | llvm-svn: 220399
* Ammending 220393 - Removing unused decoding tables.Colin LeMahieu2014-10-221-18/+0
| | | | llvm-svn: 220397
* Ammending 220393 - Removing unused functions.Colin LeMahieu2014-10-221-33/+0
| | | | llvm-svn: 220396
* [Hexagon] Adding basic disassembler.Colin LeMahieu2014-10-224-0/+173
Marking all instructions as CodeGenOnly since encoding bits are not set yet. http://reviews.llvm.org/D5829?vs=on&id=15023&whitespace=ignore-all#toc llvm-svn: 220393
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