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* [Hexagon] Implement @llvm.readcyclecounter()Krzysztof Parzyszek2017-02-221-2/+2
| | | | llvm-svn: 295892
* [Hexagon] Introduce Hexagon V62Krzysztof Parzyszek2017-02-101-14/+22
| | | | llvm-svn: 294805
* [Hexagon] Replace instruction definitions with auto-generated onesKrzysztof Parzyszek2017-02-101-1137/+177
| | | | llvm-svn: 294753
* [Hexagon] Rename TypeCOMPOUND to TypeCJKrzysztof Parzyszek2017-02-021-1/+1
| | | | llvm-svn: 293894
* [Hexagon] Fix some Clang-tidy modernize and Include What You Use warnings; ↵Eugene Zelenko2016-12-131-60/+45
| | | | | | other minor fixes (NFC). llvm-svn: 289604
* [Hexagon] Changing from literal numeric value to argument since #-1 will not ↵Colin LeMahieu2016-12-051-0/+31
| | | | | | parse when '-' is converted to a token. llvm-svn: 288634
* Support: Remove MemoryObject and DataStreamer interfaces.Peter Collingbourne2016-11-021-1/+0
| | | | | | | | These interfaces are no longer used. Differential Revision: https://reviews.llvm.org/D26222 llvm-svn: 285774
* [Hexagon] Rename operand/predicate names for unshifted integersKrzysztof Parzyszek2016-11-011-8/+8
| | | | | | | | For example, rename s6Ext to s6_0Ext. The names for shifted integers include the underscore and this will make the naming consistent. It also exposed a few duplicates that were removed. llvm-svn: 285728
* Move the global variables representing each Target behind accessor functionMehdi Amini2016-10-091-1/+1
| | | | | | | | This avoids "static initialization order fiasco" Differential Revision: https://reviews.llvm.org/D25412 llvm-svn: 283702
* [Hexagon] NFC Removing 'V4_' prefix from duplex instruction names.Colin LeMahieu2016-10-071-261/+261
| | | | llvm-svn: 283514
* [Hexagon] NFC. Canonicalizing absolute address instruction names.Colin LeMahieu2016-10-061-42/+42
| | | | llvm-svn: 283507
* [Hexagon] Fix disassembler crash after r279255Krzysztof Parzyszek2016-09-091-0/+3
| | | | | | | When p0 was added as an explicit operand to the duplex subinstructions, the disassembler was not updated to reflect this. llvm-svn: 281104
* [NFC] Header cleanupMehdi Amini2016-04-181-1/+0
| | | | | | | | | | | | | | Removed some unused headers, replaced some headers with forward class declarations. Found using simple scripts like this one: clear && ack --cpp -l '#include "llvm/ADT/IndexedMap.h"' | xargs grep -L 'IndexedMap[<]' | xargs grep -n --color=auto 'IndexedMap' Patch by Eugene Kosov <claprix@yandex.ru> Differential Revision: http://reviews.llvm.org/D19219 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 266595
* [Hexagon] Adding missing break in switch statement. Extra operands would ↵Colin LeMahieu2016-03-161-0/+1
| | | | | | have been appended to the end. llvm-svn: 263657
* [NFC] Convert tabs to spaces.Colin LeMahieu2016-03-011-2/+2
| | | | llvm-svn: 262411
* [NFC] Referencing manual for reason why subregbit is checkedColin LeMahieu2016-02-011-1/+2
| | | | llvm-svn: 259380
* Reflect the MC/MCDisassembler split on the include/ level.Benjamin Kramer2016-01-261-1/+1
| | | | | | No functional change, just moving code around. llvm-svn: 258818
* Replace uint16_t with the MCPhysReg typedef in many places. A lot of ↵Craig Topper2015-12-051-16/+16
| | | | | | physical register arrays already use this typedef. llvm-svn: 254843
* [Hexagon] Use array_lengthof and const correct and type correct the array ↵Craig Topper2015-12-011-7/+5
| | | | | | and array size. NFC llvm-svn: 254384
* Use array_lengthof instead of manually calculating it. NFCCraig Topper2015-12-011-2/+2
| | | | llvm-svn: 254383
* [Hexagon] Use ArrayRef to avoid needing to calculate an array size. ↵Craig Topper2015-12-011-16/+11
| | | | | | Interestingly the original code may have had a bug because it was passing the byte size of a uint16_t array instead of the number of entries. llvm-svn: 254382
* [Hexagon] Factoring bundle creation in to a utility function.Colin LeMahieu2015-11-131-2/+1
| | | | llvm-svn: 253056
* [Hexagon] Enabling ASM parsing on Hexagon backend and adding instruction ↵Colin LeMahieu2015-11-091-209/+738
| | | | | | parsing tests. General updating of the code emission. llvm-svn: 252443
* [Hexagon] Fixing mistaken case fallthrough.Colin LeMahieu2015-11-031-0/+1
| | | | llvm-svn: 251867
* [Hexagon] Adding skeleton of HVX extension instructions.Colin LeMahieu2015-10-171-0/+75
| | | | llvm-svn: 250600
* Explicitly clear the MI operand list when getInstruction() is called. Call ↵Cameron Esfahani2015-08-111-0/+1
| | | | | | | | | | | | | | MI.clear() within MCD::OPC_Decode case and inside of translateInstruction() for the X86 target. Remove now unnecessary MI.clear() from ARMDisassembler. Summary: Explicitly clear the MI operand list when getInstruction() is called. Reviewers: hfinkel, t.p.northover, hvarga, kparzysz, jyknight, qcolombet, uweigand Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11665 llvm-svn: 244557
* Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)Alexander Kornienko2015-06-231-1/+1
| | | | | | Apparently, the style needs to be agreed upon first. llvm-svn: 240390
* Fixed/added namespace ending comments using clang-tidy. NFCAlexander Kornienko2015-06-191-1/+1
| | | | | | | | | | | | | The patch is generated using this command: tools/clang/tools/extra/clang-tidy/tool/run-clang-tidy.py -fix \ -checks=-*,llvm-namespace-comment -header-filter='llvm/.*|clang/.*' \ llvm/lib/ Thanks to Eugene Kosov for the original patch! llvm-svn: 240137
* [Hexagon] Adding decoders for signed operands and ensuring all signed ↵Colin LeMahieu2015-06-101-0/+118
| | | | | | operand types disassemble correctly. llvm-svn: 239477
* [Hexagon] Reapply r239097 with tests corrected for shuffling and duplexing.Colin LeMahieu2015-06-051-52/+690
| | | | llvm-svn: 239161
* Revert r239095 incorrect test tree.Colin LeMahieu2015-06-041-690/+52
| | | | llvm-svn: 239102
* [Hexagon] Adding functionality for duplexing. Duplexing is a way to ↵Colin LeMahieu2015-06-041-52/+690
| | | | | | compress commonly used pairs of instructions in order to reduce code size. The test case duplex.ll normally would be 8 bytes, assign register to 0 and jump to link register. After duplexing this is only 4 bytes. This also tests the HexagonMCShuffler code path which is used to make sure duplexed instructions still follow slot requirements. llvm-svn: 239095
* [Hexagon] Disassembling, printing, and emitting instructions a whole-bundle ↵Colin LeMahieu2015-05-291-9/+53
| | | | | | at a time which is the semantic unit for Hexagon. Fixing tests to use the new format. Disabling tests in the direct object emission path for a followup patch. llvm-svn: 238556
* MC: Modernize MCOperand API naming. NFC.Jim Grosbach2015-05-131-6/+6
| | | | | | MCOperand::Create*() methods renamed to MCOperand::create*(). llvm-svn: 237275
* [Hexagon] Moving remaining methods off of HexagonMCInst in to ↵Colin LeMahieu2015-02-191-2/+2
| | | | | | HexagonMCInstrInfo and eliminating HexagonMCInst class. llvm-svn: 229914
* [Hexagon] Adding vector load with post-increment instructions. Adding ↵Colin LeMahieu2015-02-101-0/+26
| | | | | | decoder function for 64bit control register class. llvm-svn: 228708
* [cleanup] Re-sort all the #include lines in LLVM usingChandler Carruth2015-01-141-5/+3
| | | | | | | | | | | utils/sort_includes.py. I clearly haven't done this in a while, so more changed than usual. This even uncovered a missing include from the InstrProf library that I've added. No functionality changed here, just mechanical cleanup of the include order. llvm-svn: 225974
* [Hexagon] Adding deallocframe and circular addressing loads.Colin LeMahieu2014-12-261-0/+19
| | | | llvm-svn: 224869
* [Hexagon] Adding transfers to and from control registers.Colin LeMahieu2014-12-191-0/+23
| | | | llvm-svn: 224599
* [Hexagon] Adding DoubleRegs decoder. Moving C2_mux and A2_nop. Adding ↵Colin LeMahieu2014-12-051-0/+24
| | | | | | combine imm-imm form. llvm-svn: 223494
* [Hexagon] Marking some instructions as CodeGenOnly=0 and adding disassembly ↵Colin LeMahieu2014-12-041-1/+4
| | | | | | tests. llvm-svn: 223334
* [Hexagon] Converting from ADD_rr to A2_add which has encoding bits.Colin LeMahieu2014-11-181-0/+34
| | | | | | Adding test to show correct instruction selection and encoding. llvm-svn: 222249
* Pass an ArrayRef to MCDisassembler::getInstruction.Rafael Espindola2014-11-121-5/+3
| | | | | | | | | | | | With this patch MCDisassembler::getInstruction takes an ArrayRef<uint8_t> instead of a MemoryObject. Even on X86 there is a maximum size an instruction can have. Given that, it seems way simpler and more efficient to just pass an ArrayRef to the disassembler instead of a MemoryObject and have it do a virtual call every time it wants some extra bytes. llvm-svn: 221751
* Misc style fixes. NFC.Rafael Espindola2014-11-101-5/+6
| | | | | | | | | | | | | This fixes a few cases of: * Wrong variable name style. * Lines longer than 80 columns. * Repeated names in comments. * clang-format of the above. This make the next patch a lot easier to read. llvm-svn: 221615
* [Hexagon] Reverting 220584 to address ASAN errors.Colin LeMahieu2014-11-041-34/+0
| | | | llvm-svn: 221210
* Prune CRLF.NAKAMURA Takumi2014-10-271-115/+115
| | | | llvm-svn: 220678
* [Hexagon] Resubmission of 220427Colin LeMahieu2014-10-241-0/+34
| | | | | | | | | | | Modified library structure to deal with circular dependency between HexagonInstPrinter and HexagonMCInst. Adding encoding bits for add opcode. Adding llvm-mc tests. Removing unit tests. http://reviews.llvm.org/D5624 llvm-svn: 220584
* Revert r220427, "[Hexagon] Adding encoding bits for add opcode."NAKAMURA Takumi2014-10-231-34/+0
| | | | | | It brought cyclic dependecy between HexagonAsmPrinter and HexagonDesc. llvm-svn: 220478
* [Hexagon] Adding encoding bits for add opcode.Colin LeMahieu2014-10-221-0/+34
| | | | | | | | | Adding llvm-mc tests. Removing unit tests. http://reviews.llvm.org/D5624 llvm-svn: 220427
* Fix VS2012 build; C++11 type aliases are not supported.Hans Wennborg2014-10-221-1/+2
| | | | llvm-svn: 220399
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