summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/CellSPU/SPUISelLowering.cpp
Commit message (Collapse)AuthorAgeFilesLines
* don't try to avoid inserting loads when lowering FORMAL_ARGUMENTS. Chris Lattner2008-02-131-11/+3
| | | | | | DAGCombine is now quite good at zapifying them. llvm-svn: 47053
* Convert SelectionDAG::ComputeMaskedBits to use APInt instead of uint64_t.Dan Gohman2008-02-131-5/+4
| | | | | | | Add an overload that supports the uint64_t interface for use by clients that haven't been updated yet. llvm-svn: 47039
* Move to getCALLSEQ_END to ensure CALLSEQ_END node produces a flag. This is ↵Evan Cheng2008-02-051-2/+7
| | | | | | consistent with the definition in td file. llvm-svn: 46775
* Even though InsertAtEndOfBasicBlock is an ugly hack it still deserves a ↵Evan Cheng2008-01-301-11/+0
| | | | | | | | proper name. Rename it to EmitInstrWithCustomInserter since it does not necessarily insert instruction at the end. llvm-svn: 46562
* More cleanups for CellSPU:Scott Michel2008-01-301-211/+210
| | | | | | | | | - Expand tabs... (poss 80-col violations, will get them later...) - Consolidate logic for SelectDFormAddr and SelectDForm2Addr into a single function, simplifying maintenance. Also reduced custom instruction generation for SPUvecinsert/INSERT_MASK. llvm-svn: 46544
* Factor the addressing mode and the load/store VT out of LoadSDNodeDan Gohman2008-01-301-2/+2
| | | | | | | | and StoreSDNode into their common base class LSBaseSDNode. Member functions getLoadedVT and getStoredVT are replaced with the common getMemoryVT to simplify code that will handle both loads and stores. llvm-svn: 46538
* Overhaul Cell SPU's addressing mode internals so that there are nowScott Michel2008-01-291-37/+103
| | | | | | | | | | | | | | only two addressing mode nodes, SPUaform and SPUindirect (vice the three previous ones, SPUaform, SPUdform and SPUxform). This improves code somewhat because we now avoid using reg+reg addressing when it can be avoided. It also simplifies the address selection logic, which was the main point for doing this. Also, for various global variables that would be loaded using SPU's A-form addressing, prefer D-form offs[reg] addressing, keeping the base in a register if the variable is used more than once. llvm-svn: 46483
* Forward progress: crtbegin.c now compiles successfully!Scott Michel2008-01-171-80/+65
| | | | | | | | | | | | | Fixed CellSPU's A-form (local store) address mode, so that all globals, externals, constant pool and jump table symbols are now wrapped within a SPUISD::AFormAddr pseudo-instruction. This now identifies all local store memory addresses, although it requires a bit of legerdemain during instruction selection to properly select loads to and stores from local store, properly generating "LQA" instructions. Also added mul_ops.ll test harness for exercising integer multiplication. llvm-svn: 46142
* This commit changes:Chris Lattner2008-01-171-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Legalize now always promotes truncstore of i1 to i8. 2. Remove patterns and gunk related to truncstore i1 from targets. 3. Rename the StoreXAction stuff to TruncStoreAction in TLI. 4. Make the TLI TruncStoreAction table a 2d table to handle from/to conversions. 5. Mark a wide variety of invalid truncstores as such in various targets, e.g. X86 currently doesn't support truncstore of any of its integer types. 6. Add legalize support for truncstores with invalid value input types. 7. Add a dag combine transform to turn store(truncate) into truncstore when safe. The later allows us to compile CodeGen/X86/storetrunc-fp.ll to: _foo: fldt 20(%esp) fldt 4(%esp) faddp %st(1) movl 36(%esp), %eax fstps (%eax) ret instead of: _foo: subl $4, %esp fldt 24(%esp) fldt 8(%esp) faddp %st(1) fstps (%esp) movl 40(%esp), %eax movss (%esp), %xmm0 movss %xmm0, (%eax) addl $4, %esp ret llvm-svn: 46140
* improve cygwin compatibility, patch by Sam BishopChris Lattner2008-01-121-1/+1
| | | | llvm-svn: 45917
* More CellSPU refinements:Scott Michel2008-01-111-5/+12
| | | | | | | | | | | | - struct_2.ll: Completely unaligned load/store testing - call_indirect.ll, struct_1.ll: Add test lines to exercise X-form [$reg($reg)] addressing At this point, loads and stores should be under control (he says in an optimistic tone of voice.) llvm-svn: 45882
* More CellSPU refinement and progress:Scott Michel2008-01-111-257/+235
| | | | | | | | | | | | | | | | | | | | - Cleaned up custom load/store logic, common code is now shared [see note below], cleaned up address modes - More test cases: various intrinsics, structure element access (load/store test), updated target data strings, indirect function calls. Note: This patch contains a refactoring of the LoadSDNode and StoreSDNode structures: they now share a common base class, LSBaseSDNode, that provides an interface to their common functionality. There is some hackery to access the proper operand depending on the derived class; otherwise, to do a proper job would require finding and rearranging the SDOperands sent to StoreSDNode's constructor. The current refactor errs on the side of being conservatively and backwardly compatible while providing functionality that reduces redundant code for targets where loads and stores are custom-lowered. llvm-svn: 45851
* Rename SSARegMap -> MachineRegisterInfo in keeping with the idea Chris Lattner2007-12-311-51/+39
| | | | | | | | | | | | | | that "machine" classes are used to represent the current state of the code being compiled. Given this expanded name, we can start moving other stuff into it. For now, move the UsedPhysRegs and LiveIn/LoveOuts vectors from MachineFunction into it. Update all the clients to match. This also reduces some needless #includes, such as MachineModuleInfo from MachineFunction. llvm-svn: 45467
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-3/+2
| | | | llvm-svn: 45418
* fix some warnings. This code needs to be de-tabified :(Chris Lattner2007-12-221-2/+3
| | | | llvm-svn: 45325
* More working CellSPU tests:Scott Michel2007-12-201-9/+13
| | | | | | | - vec_const.ll: Vector constant loads - immed64.ll: i64, f64 constant loads llvm-svn: 45242
* CellSPU testcase, extract_elt.ll: extract vector element.Scott Michel2007-12-191-2/+5
| | | | llvm-svn: 45219
* Two more test cases: or_ops.ll (arithmetic or operations) and vecinsert.llScott Michel2007-12-191-4/+3
| | | | | | (vector insertions) llvm-svn: 45216
* Add new immed16.ll test case, fix CellSPU errata to make test case work.Scott Michel2007-12-191-7/+9
| | | | llvm-svn: 45196
* - Restore some i8 functionality in CellSPUScott Michel2007-12-171-6/+8
| | | | | | - New test case: nand.ll llvm-svn: 45130
* fix warningsChris Lattner2007-12-051-2/+2
| | | | llvm-svn: 44620
* Updated source file headers to llvm coding standard.Scott Michel2007-12-051-3/+2
| | | | llvm-svn: 44597
* More of the Cell SPU code drop from "Team Aerospace".Scott Michel2007-12-041-0/+2673
llvm-svn: 44582
OpenPOWER on IntegriCloud