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* Allow targets to specify a the type of the RHS of a shift parameterized on ↵Owen Anderson2011-02-252-1/+1
| | | | | | the type of the LHS. llvm-svn: 126518
* Use explicit add_subdirectory's for LLVM target sublibraries insteadOscar Fuentes2011-02-201-0/+2
| | | | | | | | | of testing for its presence at cmake time. This way the build automatically regenerates the makefiles when a svn update brings in a new sublibrary. llvm-svn: 126068
* Teach frame lowering to ignore debug values after the terminators.Jakob Stoklund Olesen2011-01-131-1/+1
| | | | llvm-svn: 123399
* Update CMake stuffAnton Korobeynikov2011-01-101-1/+1
| | | | llvm-svn: 123171
* Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs ↵Anton Korobeynikov2011-01-106-27/+29
| | | | | | and fixes here and there. llvm-svn: 123170
* Flag -> Glue, the ongoing sagaChris Lattner2010-12-231-4/+4
| | | | llvm-svn: 122513
* rename MVT::Flag to MVT::Glue. "Flag" is a terrible name forChris Lattner2010-12-211-4/+4
| | | | | | | something that just glues two nodes together, even if it is sometimes used for flags. llvm-svn: 122310
* Move more PEI-related hooks to TFIAnton Korobeynikov2010-11-274-16/+20
| | | | llvm-svn: 120229
* Move hasFP() and few related hooks to TargetFrameInfo.Anton Korobeynikov2010-11-185-27/+35
| | | | llvm-svn: 119740
* Attempt to unbreak cmake-based buildsAnton Korobeynikov2010-11-151-0/+1
| | | | llvm-svn: 119098
* First step of huge frame-related refactoring: move emit{Prologue,Epilogue} ↵Anton Korobeynikov2010-11-156-77/+146
| | | | | | out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place llvm-svn: 119097
* move all the target's asmprinters into the main target. The piece Chris Lattner2010-11-145-23/+2
| | | | | | | that should be split out is the InstPrinter (if a target is mc'ized). This change makes all the targets be consistent. llvm-svn: 119056
* Inline asm multiple alternative constraints development phase 2 - improved ↵John Thompson2010-10-292-0/+53
| | | | | | basic logic, added initial platform support. llvm-svn: 117667
* fix a long standing wart: all the ComplexPattern's were beingChris Lattner2010-09-211-4/+2
| | | | | | | | | | | passed the root of the match, even though only a few patterns actually needed this (one in X86, several in ARM [which should be refactored anyway], and some in CellSPU that I don't feel like detangling). Instead of requiring all ComplexPatterns to take the dead root, have targets opt into getting the root by putting SDNPWantRoot on the ComplexPattern. llvm-svn: 114471
* update a bunch of code to use the MachinePointerInfo version of getStore.Chris Lattner2010-09-211-2/+1
| | | | llvm-svn: 114461
* convert the targets off the non-MachinePointerInfo of getLoad.Chris Lattner2010-09-211-1/+2
| | | | llvm-svn: 114410
* Simplify eliminateFrameIndex() interface back down now that PEI doesn't needJim Grosbach2010-08-262-10/+7
| | | | | | to try to re-use scavenged frame index reference registers. rdar://8277890 llvm-svn: 112241
* Remove empty processFunctionBeforeFrameFinalized(). The defaultJim Grosbach2010-08-062-6/+0
| | | | | | | implementation of the function is equivalent, so no need to provide the target-specific version until/unless it needs to do something. llvm-svn: 110465
* Remove the isMoveInstr() hook.Jakob Stoklund Olesen2010-07-162-32/+0
| | | | llvm-svn: 108567
* Don't pass StringRef by reference.Benjamin Kramer2010-07-142-3/+3
| | | | llvm-svn: 108366
* Make getPhysicalRegisterRegClass non-virtual. Should be able to remove it soon.Rafael Espindola2010-07-112-22/+0
| | | | llvm-svn: 108094
* Replace copyRegToReg with copyPhysReg for Blackfin.Jakob Stoklund Olesen2010-07-112-55/+57
| | | | llvm-svn: 108077
* Split the SDValue out of OutputArg so that SelectionDAG-independentDan Gohman2010-07-072-2/+6
| | | | | | code can do calling-convention queries. This obviates OutputArgReg. llvm-svn: 107786
* Propagate debug loc.Devang Patel2010-07-061-2/+2
| | | | llvm-svn: 107710
* Remove isSS argument from CreateFixedObject. Fixed objects cannot be spill ↵Evan Cheng2010-07-031-2/+1
| | | | | | slots so it's always false. llvm-svn: 107550
* Remove isTwoAddress from Blackfin.Eric Christopher2010-06-211-6/+6
| | | | llvm-svn: 106457
* Change UpdateNodeOperands' operand and return value from SDValue toDan Gohman2010-06-181-2/+2
| | | | | | SDNode *, since it doesn't care about the ResNo value. llvm-svn: 106282
* Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). ThisStuart Hastings2010-06-172-5/+4
| | | | | | | | | | | | addresses a longstanding deficiency noted in many FIXMEs scattered across all the targets. This effectively moves the problem up one level, replacing eleven FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path through FastISel where we actually supply a DebugLoc, fixing Radar 7421831. llvm-svn: 106243
* cleanupRafael Espindola2010-06-022-14/+0
| | | | llvm-svn: 105322
* Replace the SubRegSet tablegen class with a less error-prone mechanism.Jakob Stoklund Olesen2010-05-261-24/+4
| | | | | | | | | | | | | | | | A Register with subregisters must also provide SubRegIndices for adressing the subregisters. TableGen automatically inherits indices for sub-subregisters to minimize typing. CompositeIndices may be specified for the weirder cases such as the XMM sub_sd index that returns the same register, and ARM NEON Q registers where both D subregs have ssub_0 and ssub_1 sub-subregs. It is now required that all subregisters are named by an index, and a future patch will also require inherited subregisters to be named. This is necessary to allow composite subregister indices to be reduced to a single index. llvm-svn: 104704
* Revert "Replace the SubRegSet tablegen class with a less error-prone mechanism."Jakob Stoklund Olesen2010-05-261-4/+24
| | | | | | This reverts commit 104654. llvm-svn: 104660
* Replace the SubRegSet tablegen class with a less error-prone mechanism.Jakob Stoklund Olesen2010-05-261-24/+4
| | | | | | | | | | | | | | | | A Register with subregisters must also provide SubRegIndices for adressing the subregisters. TableGen automatically inherits indices for sub-subregisters to minimize typing. CompositeIndices may be specified for the weirder cases such as the XMM sub_sd index that returns the same register, and ARM NEON Q registers where both D subregs have ssub_0 and ssub_1 sub-subregs. It is now required that all subregisters are named by an index, and a future patch will also require inherited subregisters to be named. This is necessary to allow composite subregister indices to be reduced to a single index. llvm-svn: 104654
* Remove NumberHack entirely.Jakob Stoklund Olesen2010-05-251-3/+3
| | | | | | | SubRegIndex instances are now numbered uniquely the same way Register instances are - in lexicographical order by name. llvm-svn: 104627
* Switch SubRegSet to using symbolic SubRegIndicesJakob Stoklund Olesen2010-05-241-4/+4
| | | | llvm-svn: 104571
* Replace the tablegen RegisterClass field SubRegClassList with an alist-like dataJakob Stoklund Olesen2010-05-241-3/+3
| | | | | | | | | | | structure that represents a mapping without any dependencies on SubRegIndex numbering. This brings us closer to being able to remove the explicit SubRegIndex numbering, and it is now possible to specify any mapping without inventing *_INVALID register classes. llvm-svn: 104563
* Add the SubRegIndex TableGen class.Jakob Stoklund Olesen2010-05-244-34/+27
| | | | | | | This is the beginning of purely symbolic subregister indices, but we need a bit of jiggling before the explicit numeric indices can be completely removed. llvm-svn: 104492
* Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe whatBill Wendling2010-05-141-3/+3
| | | | | | | | | the variable actually tracks. N.B., several back-ends are using "HasCalls" as being synonymous for something that adjusts the stack. This isn't 100% correct and should be looked into. llvm-svn: 103802
* Implement a bunch more TargetSelectionDAGInfo infrastructure.Dan Gohman2010-05-114-3/+13
| | | | | | | | Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and EmitTargetCodeForMemmove out of TargetLowering and into SelectionDAGInfo to exercise this. llvm-svn: 103481
* Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that itDan Gohman2010-05-062-4/+4
| | | | | | doesn't have to guess. llvm-svn: 103194
* Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.Evan Cheng2010-05-062-4/+8
| | | | llvm-svn: 103193
* Implement -disable-non-leaf-fp-elim which disable frame pointer eliminationEvan Cheng2010-04-211-1/+2
| | | | | | | optimization for non-leaf functions. This will be hooked up to gcc's -momit-leaf-frame-pointer option. rdar://7886181 llvm-svn: 101984
* Use const qualifiers with TargetLowering. This eliminates severalDan Gohman2010-04-174-19/+21
| | | | | | | | | | | | | const_casts, and it reinforces the design of the Target classes being immutable. SelectionDAGISel::IsLegalToFold is now a static member function, because PIC16 uses it in an unconventional way. There is more room for API cleanup here. And PIC16's AsmPrinter no longer uses TargetLowering. llvm-svn: 101635
* Move per-function state out of TargetLowering subclasses and intoDan Gohman2010-04-171-3/+0
| | | | | | MachineFunctionInfo subclasses. llvm-svn: 101634
* Add skeleton target-specific SelectionDAGInfo files.Dan Gohman2010-04-163-0/+52
| | | | llvm-svn: 101564
* Add const qualifiers to CodeGen's use of LLVM IR constructs.Dan Gohman2010-04-151-1/+1
| | | | llvm-svn: 101334
* prune some #includes.Chris Lattner2010-04-051-1/+0
| | | | llvm-svn: 100399
* Momentous day: remove the "O" member from AsmPrinter. Now all Chris Lattner2010-04-041-4/+3
| | | | | | | | | | "asm printering" happens through MCStreamer. This also Streamerizes PIC16 debug info, which escaped my attention. This removes a leak from LLVMTargetMachine of the 'legacy' output stream. llvm-svn: 100327
* convert the non-MCInstPrinter'ized EmitInstruction Chris Lattner2010-04-041-2/+4
| | | | | | | implementations to use EmitRawText instead of writing directly to "O". llvm-svn: 100318
* fix PrintAsmOperand and PrintAsmMemoryOperand to pass down Chris Lattner2010-04-041-6/+9
| | | | | | raw_ostream to print to. llvm-svn: 100313
* change a ton of code to not implicitly use the "O" raw_ostreamChris Lattner2010-04-041-11/+13
| | | | | | member of AsmPrinter. Instead, pass it in explicitly. llvm-svn: 100306
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