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* - Added MCSubtargetInfo to capture subtarget features and schedulingEvan Cheng2011-07-012-2/+14
| | | | | | | | | itineraries. - Refactor TargetSubtarget to be based on MCSubtargetInfo. - Change tablegen generated subtarget info to initialize MCSubtargetInfo and hide more details from targets. llvm-svn: 134257
* Hide the call to InitMCInstrInfo into tblgen generated ctor.Evan Cheng2011-07-012-4/+8
| | | | llvm-svn: 134244
* Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name toEvan Cheng2011-06-304-8/+12
| | | | | | | | | | be the first encoded as the first feature. It then uses the CPU name to look up features / scheduling itineray even though clients know full well the CPU name being used to query these properties. The fix is to just have the clients explictly pass the CPU name! llvm-svn: 134127
* Make sure we use the correct register class here since we'll need toEric Christopher2011-06-301-1/+2
| | | | | | care about spill values. llvm-svn: 134122
* Remove todo.Eric Christopher2011-06-291-2/+0
| | | | llvm-svn: 134094
* Add a TODO for the Alpha port inline asm constraints.Eric Christopher2011-06-291-0/+2
| | | | llvm-svn: 134089
* Move Alpha from getRegClassForInlineAsmConstraint toEric Christopher2011-06-292-32/+14
| | | | | | | | getRegForInlineAsmConstraint. Part of rdar://9643582 llvm-svn: 134088
* Sink SubtargetFeature and TargetInstrItineraries (renamed ↵Evan Cheng2011-06-291-2/+1
| | | | | | MCInstrItineraries) into MC. llvm-svn: 134049
* Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.Evan Cheng2011-06-282-2/+3
| | | | llvm-svn: 134030
* Hide more details in tablegen generated MCRegisterInfo ctor function.Evan Cheng2011-06-281-2/+1
| | | | llvm-svn: 134027
* Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.incEvan Cheng2011-06-284-6/+7
| | | | llvm-svn: 134024
* Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.incEvan Cheng2011-06-275-8/+11
| | | | | | into XXXGenRegisterInfo.inc. llvm-svn: 133922
* Starting to refactor Target to separate out code that's needed to fully describeEvan Cheng2011-06-243-9/+11
| | | | | | | | | | | | target machine from those that are only needed by codegen. The goal is to sink the essential target description into MC layer so we can start building MC based tools without needing to link in the entire codegen. First step is to refactor TargetRegisterInfo. This patch added a base class MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to separate register description from the rest of the stuff. llvm-svn: 133782
* Use set operations instead of plain lists to enumerate register classes.Jakob Stoklund Olesen2011-06-151-12/+7
| | | | | | | | | | | | This simplifies many of the target description files since it is common for register classes to be related or contain sequences of numbered registers. I have verified that this doesn't change the files generated by TableGen for ARM and X86. It alters the allocation order of MBlaze GPR and Mips FGR32 registers, but I believe the change is benign. llvm-svn: 133105
* Remove custom allocation order boilerplate that is no longer needed.Jakob Stoklund Olesen2011-06-091-36/+3
| | | | | | | | | | | | | | | | | | | | The register allocators automatically filter out reserved registers and place the callee saved registers last in the allocation order, so custom methods are no longer necessary just for that. Some targets still use custom allocation orders: ARM/Thumb: The high registers are removed from GPR in thumb mode. The NEON allocation orders prefer to use non-VFP2 registers first. X86: The GR8 classes omit AH-DH in x86-64 mode to avoid REX trouble. SystemZ: Some of the allocation orders are omitting R12 aliases without explanation. I don't understand this target well enough to fix that. It looks like all the boilerplate could be removed by reserving the right registers. llvm-svn: 132781
* Add a parameter to CCState so that it can access the MachineFunction.Eric Christopher2011-06-081-4/+4
| | | | | | | | No functional change. Part of PR6965 llvm-svn: 132763
* Use the dwarf->llvm mapping to print register names in the cfiRafael Espindola2011-05-302-0/+6
| | | | | | | | directives. Fixes PR9826. llvm-svn: 132317
* Reserve r29 on Alpha. This fixes all verifier failures in CodeGen/Alpha.Cameron Zwarich2011-05-181-0/+1
| | | | llvm-svn: 131587
* Make the logic for determining function alignment more explicit. No ↵Eli Friedman2011-05-062-8/+2
| | | | | | functionality change. llvm-svn: 131012
* Fix a ton of comment typos found by codespell. Patch byChris Lattner2011-04-154-5/+5
| | | | | | Luis Felipe Strano Moraes! llvm-svn: 129558
* Allow targets to specify a the type of the RHS of a shift parameterized on ↵Owen Anderson2011-02-252-7/+8
| | | | | | the type of the LHS. llvm-svn: 126518
* Use explicit add_subdirectory's for LLVM target sublibraries insteadOscar Fuentes2011-02-201-0/+2
| | | | | | | | | of testing for its presence at cmake time. This way the build automatically regenerates the makefiles when a svn update brings in a new sublibrary. llvm-svn: 126068
* Swap VT and DebugLoc operands of getExtLoad() for consistency withStuart Hastings2011-02-161-3/+3
| | | | | | other getNode() methods. Radar 9002173. llvm-svn: 125665
* Teach frame lowering to ignore debug values after the terminators.Jakob Stoklund Olesen2011-01-131-1/+1
| | | | llvm-svn: 123399
* Update CMake stuffAnton Korobeynikov2011-01-101-1/+1
| | | | llvm-svn: 123171
* Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs ↵Anton Korobeynikov2011-01-105-21/+23
| | | | | | and fixes here and there. llvm-svn: 123170
* Flag -> Glue, the ongoing sagaChris Lattner2010-12-231-3/+3
| | | | llvm-svn: 122513
* rename MVT::Flag to MVT::Glue. "Flag" is a terrible name forChris Lattner2010-12-212-4/+4
| | | | | | | something that just glues two nodes together, even if it is sometimes used for flags. llvm-svn: 122310
* Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.Wesley Peck2010-11-231-7/+7
| | | | llvm-svn: 119990
* Move hasFP() and few related hooks to TargetFrameInfo.Anton Korobeynikov2010-11-184-24/+24
| | | | llvm-svn: 119740
* Attempt to unbreak cmake-based buildsAnton Korobeynikov2010-11-151-0/+1
| | | | llvm-svn: 119098
* First step of huge frame-related refactoring: move emit{Prologue,Epilogue} ↵Anton Korobeynikov2010-11-157-130/+204
| | | | | | out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place llvm-svn: 119097
* move all the target's asmprinters into the main target. The piece Chris Lattner2010-11-145-22/+2
| | | | | | | that should be split out is the InstPrinter (if a target is mc'ized). This change makes all the targets be consistent. llvm-svn: 119056
* fix cmakeChris Lattner2010-11-141-1/+0
| | | | llvm-svn: 119053
* remove JIT support from the Alpha backend. The JIT will be moving to MC, Chris Lattner2010-11-148-604/+2
| | | | | | and the Alpha backend isn't MCized yet. Approved by Andrew. llvm-svn: 119051
* Inline asm multiple alternative constraints development phase 2 - improved ↵John Thompson2010-10-292-0/+30
| | | | | | basic logic, added initial platform support. llvm-svn: 117667
* Make <target>CodeEmitter::getBinaryCodeForInstr() a const method.Jim Grosbach2010-10-081-3/+3
| | | | llvm-svn: 116018
* Add support to model pipeline bypass / forwarding.Evan Cheng2010-09-281-1/+1
| | | | llvm-svn: 115005
* Removed a bunch of unnecessary target_link_libraries.Oscar Fuentes2010-09-281-2/+0
| | | | llvm-svn: 114999
* update a bunch of code to use the MachinePointerInfo version of getStore.Chris Lattner2010-09-211-7/+7
| | | | llvm-svn: 114461
* eliminate an old SelectionDAG::getTruncStore method, propagatingChris Lattner2010-09-211-3/+6
| | | | | | MachinePointerInfo around more. llvm-svn: 114452
* propagate MachinePointerInfo through various uses of the oldChris Lattner2010-09-211-3/+4
| | | | | | SelectionDAG::getExtLoad overload, and eliminate it. llvm-svn: 114446
* convert the targets off the non-MachinePointerInfo of getLoad.Chris Lattner2010-09-211-5/+9
| | | | llvm-svn: 114410
* AlphaSchedule.td: 7bit-ize.NAKAMURA Takumi2010-09-171-1/+1
| | | | llvm-svn: 114173
* zap dead code.Chris Lattner2010-09-041-13/+0
| | | | llvm-svn: 113073
* Simplify eliminateFrameIndex() interface back down now that PEI doesn't needJim Grosbach2010-08-262-7/+4
| | | | | | to try to re-use scavenged frame index reference registers. rdar://8277890 llvm-svn: 112241
* remove some dead code.Chris Lattner2010-08-181-2/+0
| | | | llvm-svn: 111345
* Reapply r110396, with fixes to appease the Linux buildbot gods.Owen Anderson2010-08-063-3/+3
| | | | llvm-svn: 110460
* Revert r110396 to fix buildbots.Owen Anderson2010-08-063-3/+3
| | | | llvm-svn: 110410
* Don't use PassInfo* as a type identifier for passes. Instead, use the ↵Owen Anderson2010-08-053-3/+3
| | | | | | | | address of the static ID member as the sole unique type identifier. Clean up APIs related to this change. llvm-svn: 110396
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