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* [AVR] Fix a bug where asm operands are printed twiceDylan McKay2017-02-051-1/+2
| | | | | | | We would unconditionally call printOperand, even if PrintAsmOperand already printed the immediate. llvm-svn: 294121
* [AVR] Support zero-sized arguments in defined methodsDylan McKay2017-02-051-0/+6
| | | | | | | | | | | It is sufficient to skip emission of these arguments as we have nothing to actually pass through the function call. The AVR-GCC reference has nothing to say about zero-sized arguments, presumably because C/C++ doesn't support them. This means we don't have to worry about ABI differences. llvm-svn: 294119
* [CodeGen] Rename MachineInstrBuilder::addOperand. NFCDiana Picus2017-01-131-10/+7
| | | | | | | | | | | Rename from addOperand to just add, to match the other method that has been added to MachineInstrBuilder for adding more than just 1 operand. See https://reviews.llvm.org/D28057 for the whole discussion. Differential Revision: https://reviews.llvm.org/D28556 llvm-svn: 291891
* [AVR] Implement TargetLoweing::getRegisterByNameDylan McKay2017-01-072-0/+44
| | | | | | | This allows the use of the 'read_register' intrinsics used by clang's named register globals features. llvm-svn: 291375
* [AVR] Parenthesize a boolean expressionDylan McKay2017-01-071-2/+2
| | | | | | | Without the parentheses, clang would emit warnings while compiling the code. llvm-svn: 291320
* [AVR] Optimize 16-bit ANDs with '1'Dylan McKay2016-12-311-0/+4
| | | | | | | | | | | | Summary: Fixes PR 31345 Reviewers: dylanmckay Subscribers: fhahn, llvm-commits Differential Revision: https://reviews.llvm.org/D28186 llvm-svn: 290778
* [AVR] Optimize 16-bit ORs with '0'Dylan McKay2016-12-301-12/+27
| | | | | | | | | | | | | | Summary: Fixes PR 31344 Authored by Anmol P. Paralkar Reviewers: dylanmckay Subscribers: fhahn, llvm-commits Differential Revision: https://reviews.llvm.org/D28121 llvm-svn: 290732
* [AVR] Support floats in the instrumention passDylan McKay2016-12-151-14/+14
| | | | | | This also refactors some common code into the 'GetTypeName' method. llvm-svn: 289803
* [AVR] Add argument indices to the instrumention hook functionsDylan McKay2016-12-151-2/+4
| | | | | | | This allows the instrumention hook functions to do better pretty-printing. llvm-svn: 289793
* [AVR] Add a function instrumentation passDylan McKay2016-12-144-0/+224
| | | | | | This will be used for an on-chip test suite. llvm-svn: 289641
* [AVR] Add an 'relax memory operation' passDylan McKay2016-12-135-2/+157
| | | | | | | | | | | | | | | | | | | | | | Summary: This pass will be used to relax instructions which use out of bounds memory accesses to equivalent operations that can work with the addresses. The pass currently implements relaxation for the STDWPtrQRr instruction. Without this pass, an assertion error would be hit in the pseudo expansion pass. In the future, we will need to add more instructions to this pass. We can do that on a case-by-case basic. Reviewers: arsenm, kparzysz Subscribers: wdng, llvm-commits, mgorny Differential Revision: https://reviews.llvm.org/D27650 llvm-svn: 289517
* [AVR] Fix a signed vs unsigned compiler warningDylan McKay2016-12-111-1/+1
| | | | llvm-svn: 289349
* [AVR] Remove incorrect commentDylan McKay2016-12-101-2/+0
| | | | | | This should've been removed in r289323. llvm-svn: 289346
* [AVR] Add a stub README fileDylan McKay2016-12-101-0/+8
| | | | llvm-svn: 289326
* [AVR] Fix and clean up the inline assembly testsDylan McKay2016-12-101-1/+3
| | | | | | | | | | There was a bug where we would hit an assertion if 'Q' was used as a constraint. I also removed hardcoded register names to prefer regexes so the tests don't break when the register allocator changes. llvm-svn: 289325
* [AVR] Fix an inline asm assertion which would always triggerDylan McKay2016-12-101-1/+1
| | | | | | | It looks like some time in the past, constraint codes were changed from chars being passed around to enums. llvm-svn: 289323
* [AVR] Use the register scavenger when expanding 'LDDW' instructionsDylan McKay2016-12-101-25/+45
| | | | | | | | | | | | Summary: This gets rid of the hardcoded 'r0' that was used previously. Reviewers: asl Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D27567 llvm-svn: 289322
* [AVR] Support stores to undefined pointersDylan McKay2016-12-101-1/+2
| | | | | | This would previously trigger an assertion error in AVRISelDAGToDAG. llvm-svn: 289321
* [AVR] Fix a bunch of incorrect assertion messagesDylan McKay2016-12-102-5/+5
| | | | | | | | | | These should've been checking whether the immediate is a 6-bit unsigned integer. If the immediate was '63', this would cause an assertion error which shouldn't have occurred. llvm-svn: 289315
* [AVR] Use a more appropriate integer type for wide IN/OUT instructionsDylan McKay2016-12-091-2/+2
| | | | | | | | | | We could previously select an integer which would hit an assertion error in pseudo expansion. The new type will also generate the appropriate fixups if needed, which wasn't done beforehand. llvm-svn: 289192
* [AVR] Add tests for a large number of pseudo instructionsDylan McKay2016-12-091-0/+12
| | | | | | This adds MIR tests for 24 pseudo instructions. llvm-svn: 289191
* [AVR] Add an assertion to ensure we don't emit LPM when it's unsupportedDylan McKay2016-12-081-0/+2
| | | | llvm-svn: 289030
* [AVR] Expand 'SELECT_CC' nodes whereever possibleDylan McKay2016-12-071-2/+2
| | | | llvm-svn: 288905
* [AVR] Allow loading from stack slots where src and dest registers are identicalDylan McKay2016-12-074-8/+48
| | | | | | Fixes PR 31256 llvm-svn: 288897
* [AVR] Remove a bunch of unused variablesDylan McKay2016-11-192-7/+2
| | | | llvm-svn: 287416
* [AVR] Remove a variable which was unused in release modeDylan McKay2016-11-191-3/+2
| | | | | | | In release mode where assertions are not enabled, this caused an 'unused variable' warning. llvm-svn: 287414
* [CMake] NFC. Updating CMake dependency specificationsChris Bieneman2016-11-171-2/+3
| | | | | | This patch updates a bunch of places where add_dependencies was being explicitly called to add dependencies on intrinsics_gen to instead use the DEPENDS named parameter. This cleanup is needed for a patch I'm working on to add a dependency debugging mode to the build system. llvm-svn: 287206
* [AVR] Wrap all methods in the pseudo expansion pass in an anon namespaceDylan McKay2016-11-161-2/+2
| | | | | | | The '-fpermissive' compiler flag complains if the template specializations used in the class are used in a different namespace. llvm-svn: 287176
* [AVR] Remove unused method from AVRTargetMachineDylan McKay2016-11-161-3/+0
| | | | llvm-svn: 287173
* [AVR] Add the pseudo instruction expansion passDylan McKay2016-11-163-1/+1433
| | | | | | | | | | | | | | | | | | Summary: A lot of the pseudo instructions are required because LLVM assumes that all integers of the same size as the pointer size are legal. This means that it will not currently expand 16-bit instructions to their 8-bit variants because it thinks 16-bit types are legal for the operations. This also adds all of the CodeGen tests that required the pass to run. Reviewers: arsenm, kparzysz Subscribers: wdng, mgorny, modocache, llvm-commits Differential Revision: https://reviews.llvm.org/D26577 llvm-svn: 287162
* [AVR] Enable the ISel, frame analyzer, and alloca passesDylan McKay2016-11-071-2/+8
| | | | llvm-svn: 286095
* [AVR] Add instruction selection lowering codeDylan McKay2016-11-022-0/+1938
| | | | | | | | | | | | Summary: This adds AVRISelLowering.cpp Reviewers: arsenm, kparzysz Subscribers: llvm-commits, modocache, japaric, wdng, beanz, mgorny Differential Revision: https://reviews.llvm.org/D25034 llvm-svn: 285790
* [TableGen] Move OperandMatchResultTy enum to MCTargetAsmParser.hAlex Bradbury2016-11-011-1/+1
| | | | | | | | | | | | | | | As it stands, the OperandMatchResultTy is only included in the generated header if there is custom operand parsing. However, almost all backends make use of MatchOperand_Success and friends from OperandMatchResultTy for e.g. parseRegister. This is a pain when starting an AsmParser for a new backend that doesn't yet have custom operand parsing. Move the enum to MCTargetAsmParser.h. This patch is a prerequisite for D23563 Differential Revision: https://reviews.llvm.org/D23496 llvm-svn: 285705
* [AVR] Generate all of the TableGen files we needDylan McKay2016-10-271-1/+6
| | | | | | | This enables generation of all of the TableGen files that are used downstream. llvm-svn: 285274
* [AVR] Compile the disassemblerDylan McKay2016-10-273-6/+3
| | | | | | | This also updates references of 'TheAVRTarget' to the new 'getTheAVRTarget()' method. llvm-svn: 285272
* [AVR] Add AVRISelDAGToDAG.cppDylan McKay2016-10-272-0/+564
| | | | | | | | | | | | Summary: This pulls the AVR instruction selector in-tree. Reviewers: arsenm, kparzysz Subscribers: llvm-commits, wdng, beanz, japaric, mgorny Differential Revision: https://reviews.llvm.org/D25278 llvm-svn: 285270
* [AVR] Add the machine code emitterDylan McKay2016-10-274-0/+423
| | | | | | | | | | Reviewers: arsenm, kparzysz Subscribers: wdng, beanz, japaric, llvm-commits, mgorny Differential Revision: https://reviews.llvm.org/D25388 llvm-svn: 285269
* Target: Change various section classifiers in TargetLoweringObjectFile to ↵Peter Collingbourne2016-10-242-4/+4
| | | | | | | | | | | | | | | | take a GlobalObject. These functions are about classifying a global which will actually be emitted, so it does not make sense for them to take a GlobalValue which may for example be an alias. Change the Mach-O object writer and the Hexagon, Lanai and MIPS backends to look through aliases before using TargetLoweringObjectFile interfaces. These are functional changes but all appear to be bug fixes. Differential Revision: https://reviews.llvm.org/D25917 llvm-svn: 285006
* [AVR] Add the machine code disassemblerDylan McKay2016-10-225-1/+190
| | | | | | | | This adds a super basic implementation of a machine code disassembler. It doesn't support any operands with custom encoding. llvm-svn: 284930
* [AVR] Enable generation of the TableGen assembly writer tablesDylan McKay2016-10-101-2/+3
| | | | | | | This also changes the order of the statements in CMakeLists.txt to be alphabetical. llvm-svn: 283711
* Move the global variables representing each Target behind accessor functionMehdi Amini2016-10-096-17/+20
| | | | | | | | This avoids "static initialization order fiasco" Differential Revision: https://reviews.llvm.org/D25412 llvm-svn: 283702
* [AVR] Add backend dependencies to MCTargetDesc/LLVMBuild.txtDylan McKay2016-10-081-1/+1
| | | | llvm-svn: 283642
* Fix incorrect assertion in AVRFrameLowering.cppDylan McKay2016-10-081-1/+2
| | | | | | This wasn't looking at the right instruction, and would always fail. llvm-svn: 283640
* [AVR] Don't worry about call frame size when initializing frame pointerDylan McKay2016-10-081-3/+2
| | | | | | | | | | | | | We previously only used the frame pointer if the frame pointer was too big. This was to work around a bug (described in this old commit) https://sourceforge.net/p/avr-llvm/code/204/tree//llvm/trunk/AVR/AVRFrameLowering.cpp?diff=50d64d912718465cb887d17a:203 I mistakenly invered the condition assuming it was a typo. I am now removing it because it doesn't seem to be a problem anymore (plus it's a dirty hack). llvm-svn: 283639
* [AVR] Don't shadow container while iterating in range-based loopDylan McKay2016-10-081-2/+4
| | | | | | This works on clang, but fails on GCC 4.6 llvm-svn: 283638
* [AVR] Use references rather than pointers in AVRISelLoweringDylan McKay2016-10-081-2/+2
| | | | llvm-svn: 283636
* Allow a maximum of 64 bits to be returned in registersDylan McKay2016-10-081-0/+8
| | | | | | | | The rest spills to the stack Authored by Jake Goulding llvm-svn: 283635
* [AVR] Expand MULHS for all typesDylan McKay2016-10-081-0/+3
| | | | | | | | | | Once MULHS was expanded, this exposed an issue where the condition register was thought to be 16-bit. This caused an attempt to copy a 16-bit register to an 8-bit register. Authored by Jake Goulding llvm-svn: 283634
* [AVR] Add the 'SoftFail' field to all instruction formatsDylan McKay2016-10-081-0/+2
| | | | | | This will be used in the future for disassembly. llvm-svn: 283630
* [AVR] Set up the instruction printer and the assembly backendDylan McKay2016-10-081-0/+19
| | | | llvm-svn: 283629
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