summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/AVR/AVRTargetMachine.cpp
Commit message (Collapse)AuthorAgeFilesLines
* [AVR] Set the program address space in the data layoutDylan McKay2018-02-191-1/+1
| | | | | | | | | | | | This adds the program memory address space setting to the AVR data layout. This setting was very recently added under r325479. At the moment, there are no uses of this setting. In the future, things such as switch lookup tables should reside there. llvm-svn: 325481
* Revert "TargetMachine: Merge TargetMachine and LLVMTargetMachine"Matthias Braun2017-10-121-2/+3
| | | | | | | | | | Reverting to investigate layering effects of MCJIT not linking libCodeGen but using TargetMachine::getNameWithPrefix() breaking the lldb bots. This reverts commit r315633. llvm-svn: 315637
* TargetMachine: Merge TargetMachine and LLVMTargetMachineMatthias Braun2017-10-121-3/+2
| | | | | | | | | | | | | | | Merge LLVMTargetMachine into TargetMachine. - There is no in-tree target anymore that just implements TargetMachine but not LLVMTargetMachine. - It should still be possible to stub out all the various functions in case a target does not want to use lib/CodeGen - This simplifies the code and avoids methods ending up in the wrong interface. Differential Revision: https://reviews.llvm.org/D38489 llvm-svn: 315633
* [AVR] Use 1-byte alignment for all data typesDylan McKay2017-09-261-1/+1
| | | | | | | | | | | | | | This was an oversight in the original backend data layout. The AVR architecture does not have the concept of unaligned loads - all loads/stores from all addresses are aligned to one byte. Discovered in avr-rust issue #64 https://github.com/avr-rust/rust/issues/64 Patch By Gergo Erdi. llvm-svn: 314179
* [AVR] Compute code model if one is not providedMeador Inge2017-08-061-6/+10
| | | | | | | | | | | | | | The patch from r310028 fixed things to work with the new `LLVMTargetMachine` constructor that came in on r309911. However, the fix was partial since an object of type `CodeModel::Model` must be passed to `LLVMTargetMachine` (not one of `Optional<CodeModel::Model>`). This patch fixes the problem in the same fashion that r309911 did for other machines: by checking if the passed optional code model has a value and using `CodeModel::Small` if not. llvm-svn: 310200
* [AVR] Update target machine to use new constructor parametersDylan McKay2017-08-041-3/+6
| | | | | | The required parameters were changed in r309911. llvm-svn: 310028
* [AVR] Remove the instrumentation passDylan McKay2017-07-231-1/+0
| | | | | | | | I have a much better way of running integration tests now. https://github.com/dylanmckay/avr-test-suite llvm-svn: 308857
* [AVR] Use the generic branch relaxerDylan McKay2017-07-111-0/+6
| | | | llvm-svn: 307617
* Revert "[AVR] Add the branch selection pass from the GitHub repository"Dylan McKay2017-07-051-6/+0
| | | | | | This reverts commit 602ef067c1d58ecb425d061f35f2bc4c7e92f4f3. llvm-svn: 307111
* [AVR] Add the branch selection pass from the GitHub repositoryDylan McKay2017-07-051-0/+6
| | | | | | | We should rewrite this using the generic branch relaxation pass, but for the moment having this pass is better than hitting an assertion error. llvm-svn: 307109
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | I did this a long time ago with a janky python script, but now clang-format has built-in support for this. I fed clang-format every line with a #include and let it re-sort things according to the precise LLVM rules for include ordering baked into clang-format these days. I've reverted a number of files where the results of sorting includes isn't healthy. Either places where we have legacy code relying on particular include ordering (where possible, I'll fix these separately) or where we have particular formatting around #include lines that I didn't want to disturb in this patch. This patch is *entirely* mechanical. If you get merge conflicts or anything, just ignore the changes in this patch and run clang-format over your #include lines in the files. Sorry for any noise here, but it is important to keep these things stable. I was seeing an increasing number of patches with irrelevant re-ordering of #include lines because clang-format was used. This patch at least isolates that churn, makes it easy to skip when resolving conflicts, and gets us to a clean baseline (again). llvm-svn: 304787
* TargetPassConfig: Keep a reference to an LLVMTargetMachine; NFCMatthias Braun2017-05-301-2/+2
| | | | | | | | | | | TargetPassConfig is not useful for targets that do not use the CodeGen library, so we may just as well store a pointer to an LLVMTargetMachine instead of just to a TargetMachine. While at it, also change the constructor to take a reference instead of a pointer as the TM must not be nullptr. llvm-svn: 304247
* [AVR] Add a function instrumentation passDylan McKay2016-12-141-0/+1
| | | | | | This will be used for an on-chip test suite. llvm-svn: 289641
* [AVR] Add an 'relax memory operation' passDylan McKay2016-12-131-1/+5
| | | | | | | | | | | | | | | | | | | | | | Summary: This pass will be used to relax instructions which use out of bounds memory accesses to equivalent operations that can work with the addresses. The pass currently implements relaxation for the STDWPtrQRr instruction. Without this pass, an assertion error would be hit in the pseudo expansion pass. In the future, we will need to add more instructions to this pass. We can do that on a case-by-case basic. Reviewers: arsenm, kparzysz Subscribers: wdng, llvm-commits, mgorny Differential Revision: https://reviews.llvm.org/D27650 llvm-svn: 289517
* [AVR] Allow loading from stack slots where src and dest registers are identicalDylan McKay2016-12-071-0/+3
| | | | | | Fixes PR 31256 llvm-svn: 288897
* [AVR] Remove unused method from AVRTargetMachineDylan McKay2016-11-161-3/+0
| | | | llvm-svn: 287173
* [AVR] Add the pseudo instruction expansion passDylan McKay2016-11-161-1/+1
| | | | | | | | | | | | | | | | | | Summary: A lot of the pseudo instructions are required because LLVM assumes that all integers of the same size as the pointer size are legal. This means that it will not currently expand 16-bit instructions to their 8-bit variants because it thinks 16-bit types are legal for the operations. This also adds all of the CodeGen tests that required the pass to run. Reviewers: arsenm, kparzysz Subscribers: wdng, mgorny, modocache, llvm-commits Differential Revision: https://reviews.llvm.org/D26577 llvm-svn: 287162
* [AVR] Enable the ISel, frame analyzer, and alloca passesDylan McKay2016-11-071-2/+8
| | | | llvm-svn: 286095
* Move the global variables representing each Target behind accessor functionMehdi Amini2016-10-091-1/+1
| | | | | | | | This avoids "static initialization order fiasco" Differential Revision: https://reviews.llvm.org/D25412 llvm-svn: 283702
* [AVR] Update the data layoutDylan McKay2016-09-281-1/+3
| | | | | | | | | | | | | | | The previous data layout caused issues when dealing with atomics. Foe example, it is illegal to load a 16-bit value with less than 16-bits of alignment. This changes the data layout so that all types are aligned by at least their own width. Interestingly, this also _slightly_ decreased register pressure in some cases. llvm-svn: 282587
* [AVR] Fix signuature of AVRTargetMachine constructorDylan McKay2016-05-201-2/+6
| | | | llvm-svn: 270292
* [AVR] Fix a few compile errorsDylan McKay2016-05-181-3/+3
| | | | llvm-svn: 269900
* CodeGen: Move TargetPassConfig from Passes.h to an own header; NFCMatthias Braun2016-05-101-0/+1
| | | | | | | | Many files include Passes.h but only a fraction needs to know about the TargetPassConfig class. Move it into an own header. Also rename Passes.cpp to TargetPassConfig.cpp while we are at it. llvm-svn: 269011
* [AVR] Add a majority of the backend codeDylan McKay2016-05-061-0/+96
| | | | | | | | | | | | Summary: This adds the majority of the AVR backend. Reviewers: hfinkel, dsanders, vkalintiris, arsenm Subscribers: dylanmckay Differential Revision: http://reviews.llvm.org/D17906 llvm-svn: 268722
* Add AVR backend skeletonDylan McKay2015-11-121-0/+4
This adds part of the target info code, and adds modifications to the build scripts so that AVR is recognized a supported, experimental backend. It does not include any AVR-specific code, just the bare sources required for a backend to exist. From D14039. llvm-svn: 252865
OpenPOWER on IntegriCloud