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* The new t2LEApcrel* pseudo instructions need the size specified.Jim Grosbach2010-12-152-5/+13
| | | | | | rdar://8768390 llvm-svn: 121876
* Implement cleanups suggested by Daniel.Owen Anderson2010-12-151-4/+4
| | | | llvm-svn: 121875
* Add fixups for Thumb LDR/STR instructions.Bill Wendling2010-12-153-3/+20
| | | | llvm-svn: 121858
* Reapply r121808 now that the missing patterns have been supplied.Bill Wendling2010-12-151-16/+21
| | | | llvm-svn: 121820
* Add some missing patterns now that tLDRB and tLDRH are split into reg andBill Wendling2010-12-151-2/+12
| | | | | | immediate versions. llvm-svn: 121819
* Revert r121808 until I can fix the build.Bill Wendling2010-12-151-21/+16
| | | | llvm-svn: 121815
* thumb adr fixup needs alignment just like the t2 version.Jim Grosbach2010-12-141-1/+2
| | | | llvm-svn: 121812
* Comments and cleaning.Bill Wendling2010-12-141-6/+4
| | | | llvm-svn: 121809
* Make the ISel selections for LDR/STR the same as before the LDRr/LDRi split. InBill Wendling2010-12-141-16/+21
| | | | | | | | | | | | | | | | particular, we want ldr r2, [r3] to be equivalent to ldr r2, [r3, #0] and not ldr r2, [r3, r0] llvm-svn: 121808
* Add support for MC-ized encoding of tLEApcrel and tLEApcrelJT. rdar://8755755Jim Grosbach2010-12-146-21/+50
| | | | llvm-svn: 121798
* Fix comment.Bill Wendling2010-12-141-1/+1
| | | | llvm-svn: 121797
* Multiclassify the LDR/STR encoding patterns. The only functionality differenceBill Wendling2010-12-141-69/+69
| | | | | | | is the addition of the FoldableAsLoad & Rematerializable flags to some of the load instructions. ARM has these flags set for them. llvm-svn: 121794
* trailing whitespaceJim Grosbach2010-12-141-4/+4
| | | | llvm-svn: 121792
* Refactor a bit for legibility.Jim Grosbach2010-12-141-28/+27
| | | | llvm-svn: 121790
* trailing whitespace.Jim Grosbach2010-12-141-4/+4
| | | | llvm-svn: 121789
* Make sure to propagate the predicate operands for LEApcrel to ADR.Jim Grosbach2010-12-141-4/+4
| | | | llvm-svn: 121788
* Fix a small bug (typo?) in the fixup for Thumb1 CBZ/CBNZ instructions.Owen Anderson2010-12-141-1/+1
| | | | llvm-svn: 121784
* MC/ARM: Fix-up fixup offset for fixup_arm_branch target specific fixup.Daniel Dunbar2010-12-141-1/+1
| | | | llvm-svn: 121772
* Trailing whitespaceJim Grosbach2010-12-141-6/+6
| | | | llvm-svn: 121769
* Use the integer scheduling intrinsic for integer loads and stores.Bill Wendling2010-12-141-6/+6
| | | | llvm-svn: 121765
* The tLDR et al instructions were emitting either a reg/reg or reg/immBill Wendling2010-12-1410-224/+340
| | | | | | | | | | | | | | | | instruction based on the t_addrmode_s# mode and what it returned. There is some obvious badness to this. In particular, it's hard to do MC-encoding when the instruction may change out from underneath you after the t_addrmode_s# variable is finally resolved. The solution is to revert a long-ago change that merged the reg/reg and reg/imm versions. There is the addition of several new addressing modes. They no longer have extraneous operands associated with them. I.e., if it's reg/reg we don't have to have a dummy zero immediate tacked on to the SDNode. There are some obvious cleanups here, which will happen shortly. llvm-svn: 121747
* bfi A, (and B, C1), C2) -> bfi A, B, C2 iff C1 & C2 == C1. rdar://8458663Evan Cheng2010-12-141-0/+20
| | | | llvm-svn: 121746
* Second attempt at make Thumb2 LEAs pseudos. This time, perform the lowering ↵Owen Anderson2010-12-146-19/+74
| | | | | | | | much later, which makes the entire process cleaner. llvm-svn: 121735
* Remove the rest of the *_sfp Neon instruction patterns.Bob Wilson2010-12-132-82/+32
| | | | | | | | | | | | | Use the same COPY_TO_REGCLASS approach as for the 2-register *_sfp instructions. This change made a big difference in the code generated for the CodeGen/Thumb2/cross-rc-coalescing-2.ll test: The coalescer is still doing a fine job, but some instructions that were previously moved outside the loop are not moved now. It's using fewer VFP registers now, which is generally a good thing, so I think the estimates for register pressure changed and that affected the LICM behavior. Since that isn't obviously wrong, I've just changed the test file. This completes the work for Radar 8711675. llvm-svn: 121730
* Simplify N2VSPat, removing some unnecessary type arguments.Bob Wilson2010-12-131-13/+12
| | | | llvm-svn: 121729
* Revert r121721, which broke buildbots.Owen Anderson2010-12-137-85/+21
| | | | llvm-svn: 121726
* Make Thumb2 LEA-like instruction into pseudos, which map down to ADR. ↵Owen Anderson2010-12-137-21/+85
| | | | | | | | Provide correct fixups for Thumb2 ADR, which is _of course_ different from ARM ADR fixups, or any other Thumb2 fixup. llvm-svn: 121721
* Delete a line that I forgot to revert previously.Bob Wilson2010-12-131-1/+0
| | | | llvm-svn: 121719
* Use COPY_TO_REGCLASS instead of pseudo instructions for Neon FP patterns.Bob Wilson2010-12-132-44/+13
| | | | | | | | Jakob Olesen suggested that we can avoid the need for separate pseudo instructions here by using COPY_TO_REGCLASS in the patterns. The pattern gets pretty ugly but it seems to work well. Partial fix for Radar 8711675. llvm-svn: 121718
* Use pseudo instructions for 2-register Neon instructions for scalar FP.Bob Wilson2010-12-132-35/+39
| | | | | | Partial fix for Radar 8711675. llvm-svn: 121716
* Remove unused instruction class arguments.Bob Wilson2010-12-131-25/+14
| | | | llvm-svn: 121715
* Generalize BFI isel lowering a bit.Evan Cheng2010-12-131-29/+35
| | | | llvm-svn: 121714
* In Thumb2, direct branches can be encoded as either a "short" conditional ↵Owen Anderson2010-12-136-8/+70
| | | | | | | | | | branch with a null predicate, or as a "long" direct branch. While the mnemonics are the same, they encode the branch offset differently, and the Darwin assembler appears to prefer the "long" form for direct branches. Thus, in the name of bitwise equivalence, provide encoding and fixup support for it. llvm-svn: 121710
* Use 32-bit types for 32-bit values.Jim Grosbach2010-12-131-3/+3
| | | | llvm-svn: 121709
* Trailing whitespace.Jim Grosbach2010-12-131-8/+8
| | | | llvm-svn: 121708
* (or (and (shl A, #shamt), mask), B) => ARMbfi B, A, ~mask where lsb(mask) == ↵Evan Cheng2010-12-112-17/+38
| | | | | | #shamt. rdar://8752056 llvm-svn: 121606
* Add FIXMEJim Grosbach2010-12-101-0/+2
| | | | llvm-svn: 121598
* Attempt to get Thumb2 branch fixups working properly.Owen Anderson2010-12-102-3/+2
| | | | llvm-svn: 121593
* Fix merge error in my last fix to Thumb2 vldr fixups.Owen Anderson2010-12-101-1/+1
| | | | llvm-svn: 121588
* Fixups for Thumb2 vldr's need to have the effective PC aligned as well.Owen Anderson2010-12-102-3/+4
| | | | llvm-svn: 121587
* The MCFixupKindInfo table needs to be in the order that the enums wereBill Wendling2010-12-101-16/+19
| | | | | | declared. Add a note specifying this and spruce up the list a bit. llvm-svn: 121586
* Provide the necessary post-encoder hook for Thumb2 encodings of VMOV and ↵Owen Anderson2010-12-101-0/+1
| | | | | | friends. llvm-svn: 121585
* Add float patterns for Neon vld1-lane/dup and vst1-lane operations.Bob Wilson2010-12-101-0/+17
| | | | llvm-svn: 121583
* Remove unused arguments.Bob Wilson2010-12-101-4/+4
| | | | llvm-svn: 121582
* Fix encoding of Thumb1 LDRB and STRB.Owen Anderson2010-12-103-0/+18
| | | | llvm-svn: 121581
* Trailing whitespace.Jim Grosbach2010-12-101-16/+16
| | | | llvm-svn: 121580
* Fix Thumb2 encodings of STREX and LDREX.Owen Anderson2010-12-101-0/+12
| | | | llvm-svn: 121579
* Correct encoding of rotation immediate for Thumb2 instructions. rdar://8755999Jim Grosbach2010-12-101-4/+5
| | | | llvm-svn: 121525
* Fix encoding of 'U' bit for Thumb2 STRD/LDRD instructions. rdar://8755726Jim Grosbach2010-12-101-4/+4
| | | | llvm-svn: 121524
* More trivial cleanup. No need to define the EncoderMethod property type. CanJim Grosbach2010-12-102-7/+7
| | | | | | just assign to it. llvm-svn: 121523
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