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* A few more thumb instruction MC encodings.Bill Wendling2010-11-201-16/+38
| | | | llvm-svn: 119913
* Rewrite address handling to use a structure with all the possible addressEric Christopher2010-11-201-11/+76
| | | | | | mode variables. Handle frame indexes in load/store and allocas again. llvm-svn: 119912
* STRH only needs the additional operand, not t2STRH. Also invert conditionalEric Christopher2010-11-201-9/+5
| | | | | | to match the one from the load emitter above. llvm-svn: 119911
* Move some more hooks to TargetFrameInfoAnton Korobeynikov2010-11-204-97/+100
| | | | llvm-svn: 119904
* Add more Thumb add instruction encodings.Bill Wendling2010-11-201-12/+47
| | | | llvm-svn: 119883
* Add Thumb encodings for some add instructions.Bill Wendling2010-11-201-6/+26
| | | | llvm-svn: 119882
* Add more encodings for Thumb instructions.Bill Wendling2010-11-201-15/+30
| | | | llvm-svn: 119881
* Have the getAddrMode3OpValue() function in ARMCodeEmitter.cpp produce the sameBill Wendling2010-11-201-9/+21
| | | | | | value that the one in ARMMCCodeEmitter.cpp does. llvm-svn: 119878
* Fix ARM LDR* post-indexed operand encoding.Jim Grosbach2010-11-191-5/+5
| | | | llvm-svn: 119869
* Encodings for the compare instructions.Bill Wendling2010-11-191-8/+19
| | | | llvm-svn: 119868
* The Vm and Vn register fields must be the same for a register-register vmov.Owen Anderson2010-11-191-2/+6
| | | | llvm-svn: 119867
* Fix a cut-n-paste-error.Evan Cheng2010-11-191-1/+1
| | | | llvm-svn: 119866
* Operand namesJim Grosbach2010-11-191-4/+4
| | | | llvm-svn: 119864
* trailing whitespaceJim Grosbach2010-11-191-16/+16
| | | | llvm-svn: 119863
* Don't need to save piecemeal now.Eric Christopher2010-11-191-4/+2
| | | | llvm-svn: 119862
* Update comment.Eric Christopher2010-11-191-3/+2
| | | | llvm-svn: 119861
* Add encodings for some of the thumb ADD instructions. Tests will come once theBill Wendling2010-11-191-16/+44
| | | | | | asm parser can handle them. llvm-svn: 119860
* Update comment.Eric Christopher2010-11-191-1/+1
| | | | llvm-svn: 119859
* Clarify operand names.Jim Grosbach2010-11-191-3/+3
| | | | llvm-svn: 119858
* Refactor address mode handling into a single struct (ala x86), thisEric Christopher2010-11-191-50/+72
| | | | | | | | should give allow a wider range of addressing modes. No functional change. llvm-svn: 119856
* Fix encoding for ARM MLS instruction.Jim Grosbach2010-11-191-3/+5
| | | | llvm-svn: 119855
* Add ARM encoding information for STRD.Jim Grosbach2010-11-192-17/+4
| | | | llvm-svn: 119852
* Shuffle things around a bit to keep like things together. Tidy up formatting.Jim Grosbach2010-11-191-20/+20
| | | | llvm-svn: 119851
* Revert accidental commit.Bill Wendling2010-11-191-3/+4
| | | | llvm-svn: 119850
* Change long binary encodings to use hex instead. It's more readable. AlsoBill Wendling2010-11-191-17/+20
| | | | | | initialize missing bit. llvm-svn: 119849
* Factor out operand encoding bits for ARM addressing mode 2 store instructions.Jim Grosbach2010-11-192-58/+33
| | | | llvm-svn: 119846
* Delete another dead class.Jim Grosbach2010-11-191-12/+0
| | | | llvm-svn: 119844
* whitespace tweak.Jim Grosbach2010-11-191-1/+0
| | | | llvm-svn: 119843
* Refactor PICSTR* instructions to really be pseudos. Nuke dead classes.Jim Grosbach2010-11-192-52/+6
| | | | llvm-svn: 119841
* Rename ARM .td class AIldst1 to AI2ldst for consistency with the other classes.Jim Grosbach2010-11-192-7/+7
| | | | llvm-svn: 119840
* Add ARM binary encoding information for the rest of the indexed loads.Jim Grosbach2010-11-192-175/+63
| | | | llvm-svn: 119821
* Remove dead code.Jim Grosbach2010-11-191-10/+0
| | | | llvm-svn: 119815
* ARM LDRD binary encoding.Jim Grosbach2010-11-192-22/+12
| | | | llvm-svn: 119812
* Remove hard tabs.Jim Grosbach2010-11-191-2/+2
| | | | llvm-svn: 119810
* Remove trailing whitespace.Jim Grosbach2010-11-191-62/+62
| | | | llvm-svn: 119806
* Avoid release build warnings.Benjamin Kramer2010-11-192-4/+4
| | | | llvm-svn: 119804
* Fix decoding ambiguities of stdrex and ldrex.Owen Anderson2010-11-191-4/+0
| | | | llvm-svn: 119801
* These instructions are thumb2 only.Evan Cheng2010-11-191-1/+1
| | | | llvm-svn: 119793
* Fix an obvious oversight.Evan Cheng2010-11-191-2/+2
| | | | llvm-svn: 119792
* Add MC encodings for some Thumb instructions. Test for a few of them. The "bxBill Wendling2010-11-191-17/+48
| | | | | | | lr" instruction cannot be tested just yet. It requires matching a "condition code", but adding one of those makes things go south quickly... llvm-svn: 119774
* Use array_pod_sort because the list is contiguous.Bill Wendling2010-11-191-1/+1
| | | | llvm-svn: 119769
* Provide Thumb2 encodings for strex and ldrex.Owen Anderson2010-11-191-20/+42
| | | | llvm-svn: 119768
* Minor cleanups to a few llvm_unreachable() calls.Jim Grosbach2010-11-193-14/+8
| | | | llvm-svn: 119767
* An 'unreachable' shouldn't have a '0 &&' prefix.Bill Wendling2010-11-191-2/+2
| | | | llvm-svn: 119762
* Add support for parsing the writeback ("!") token.Bill Wendling2010-11-181-65/+80
| | | | llvm-svn: 119761
* Fix .o emission of ARM movt/movw. MCSymbolRefExpr::VK_ARM_(HI||LO)16 for the ↵Jason W Kim2010-11-185-5/+68
| | | | | | | | | .o path now works for ARM. Note: lo16AllZero remains in ARMInstrInfo.td - It can be factored out when Thumb movt is repaired. Existing tests cover this update. llvm-svn: 119760
* Fix encodings for pkhbt, and fix some tests where I accidentally tested ARM ↵Owen Anderson2010-11-181-6/+6
| | | | | | mode instead of Thumb2. llvm-svn: 119755
* ARM Encoding information for UXTAH and friends.Jim Grosbach2010-11-181-0/+12
| | | | llvm-svn: 119753
* Fix bug in DAGCombiner for ARM that was trying to do a ShiftCombine on ↵Tanya Lattner2010-11-181-1/+2
| | | | | | | | illegal types (vector should be split first). Added test case. llvm-svn: 119749
* Don't allocate the SmallVector of Registers. It gets messy figuring out whoBill Wendling2010-11-181-13/+5
| | | | | | | should delete what when the object gets copied around. It's also making valgrind upset. llvm-svn: 119747
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