| Commit message (Collapse) | Author | Age | Files | Lines |
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identifier. There is no way to work around it.
llvm-svn: 93896
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function can support dynamic stack realignment. That's a much easier question
to answer at instruction selection stage than whether the function actually
will have dynamic alignment prologue. This allows the removal of the
stack alignment heuristic pass, and improves code quality for cases where
the heuristic would result in dynamic alignment code being generated when
it was not strictly necessary.
llvm-svn: 93885
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llvm-svn: 93863
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llvm-svn: 93853
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"isdarwin".
llvm-svn: 93852
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This makes a similar code dead in all the other targets, I'll clean it up
in a bit.
This also moves handling of lcomm up before acquisition of a section,
since lcomm never needs a section.
llvm-svn: 93851
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darwin into common code.
llvm-svn: 93849
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duplicating the logic (differently) in lots of different targets.
llvm-svn: 93847
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llvm-svn: 93845
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simplify and commonize some of the asmprinter logic for globals.
This also avoids printing the MCSection for .zerofill, which broke
the llvm-gcc build.
llvm-svn: 93843
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llvm-svn: 93839
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1. TargetLoweringObjectFileMachO should decide if something
goes in zerofill instead of having every target do it.
2. TargetLoweringObjectFileMachO should assign said symbols to
the right MCSection, the asmprinters should just emit to the
right section.
3. Since all zerofill stuff goes through mcstreamer anymore,
MAI can have a bool "haszerofill" instead of having the textual
directive to emit.
llvm-svn: 93838
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and make sure we pick different instructions for ARM vs. Thumb2.
llvm-svn: 93829
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printing via <<. Otherwise we just print the pointer value.
llvm-svn: 93777
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the various MOV (register) instructions (16-bit Thumb), including tBRIND (the
indirect branch). Instead of '1', it should be specified as '?', because GPR
only specifies the register class, which includes both hi-and-lo registers.
llvm-svn: 93759
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"On ARMv6T2 this turns cttz into rbit, clz instead of the 4 instruction
sequence it is now."
llvm-svn: 93758
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with the rest of the assembly output, is easier to read, and matches the
expected output for gcc's Neon tests.
llvm-svn: 93703
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printing them.
llvm-svn: 93699
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remove it and change all the code that prints MCSymbols to use
<< instead, which is much simpler and cleaner.
llvm-svn: 93695
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adding an "i" to the suffix, indicating that the elements are integers, is
accepted but not part of the standard syntax. This helps us pass a few more
of the Neon tests from gcc.
llvm-svn: 93677
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vector load-lane and store-lane instructions.
llvm-svn: 93673
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and add an explicit ForcePrivate argument.
Switch FunctionEHFrameInfo to be MCSymbol based instead of string based.
llvm-svn: 93646
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llvm-svn: 93615
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and CurrentFnName.
llvm-svn: 93594
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llvm-svn: 93587
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llvm-svn: 93582
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llvm-svn: 93578
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helper method, use it to simplify some code.
llvm-svn: 93575
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handle physical registers R0-R7 when described as having a non-tGPR register
class.
llvm-svn: 93564
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llvm-svn: 93480
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EmitAtomicBinary() already does this.
llvm-svn: 93479
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the disassembler can properly decode Load/Store register/immediate instructions.
llvm-svn: 93471
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the new ParseInstruction method just parses and returns a list of
target operands. A new MatchInstruction interface is used to
turn the operand list into an MCInst.
This requires new/deleting all the operands, but it also gives
targets the ability to use polymorphic operands if they want to.
llvm-svn: 93469
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Pass in SMLoc of instr opcode into ParseInstruction.
Make AsmToken be a class, not a struct.
llvm-svn: 93457
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llvm-svn: 93455
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This is consistent with llvm-gcc's arm/constraints.md.
Certain instructions (e.g. CBZ, CBNZ) require a low register, even in Thumb2
mode.
llvm-svn: 93436
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An unaligned ldr causes a trap, and is then emulated by the kernel with
awesome performance. The darwin kernel does not emulate unaligned ldm/stm
Thumb2 instructions, so don't generate them.
This fixes the miscompilation of Multisource/Applications/JM/lencod for Thumb2.
Generating unaligned ldr/str pairs from a 16-bit aligned memcpy is probably
also a bad idea, but that is beyond the scope of this patch.
llvm-svn: 93393
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llvm-svn: 93349
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llvm-svn: 93342
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llvm-svn: 93310
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instead of returning it in an std::string. Based on this change:
1. Change TargetLoweringObjectFileCOFF::getCOFFSection to take a StringRef
2. Change a bunch of targets to call makeNameProper with a smallstring,
making several of them *much* more efficient.
3. Rewrite Mangler::makeNameProper to not build names and then prepend
prefixes, not use temporary std::strings, and to avoid other crimes.
llvm-svn: 93298
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It was only being used by instructions with the t_addrmode_sp addressing mode,
and that is pattern matched in a way that guarantees SP is used. There is
never any register allocation done from this class.
llvm-svn: 93280
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T2I_bin_ii12rs definition.
llvm-svn: 93006
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llvm-svn: 92876
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Some instructions refer to unique labels, and so cannot be trivially cloned
with CloneMachineInstr.
llvm-svn: 92873
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for stack references.
llvm-svn: 92871
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llvm-svn: 92796
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instructions. Thumb does not have the restriction that t2 = t+1.
llvm-svn: 92785
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clear what information these functions are actually using.
This is also a micro-optimization, as passing a SDNode * around is
simpler than passing a { SDNode *, int } by value or reference.
llvm-svn: 92564
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llvm-svn: 92222
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