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* [CodeGen] Document and use getConstant's splat-building feature. NFC.Ahmed Bougacha2016-02-151-6/+3
| | | | | | Differential Revision: http://reviews.llvm.org/D17229 llvm-svn: 260901
* [CodeGen] Prefer "if (SDValue R = ...)" to "if (R.getNode())". NFCI.Ahmed Bougacha2016-02-091-36/+20
| | | | llvm-svn: 260316
* ARM: support TLS for WoASaleem Abdulrasool2016-02-035-0/+62
| | | | | | | | | | | Add support for TLS access for Windows on ARM. This generates a similar access to MSVC for ARM. The changes to the tablegen data is needed to support loading an external symbol global that is not for a call. The adjustments to the DAG to DAG transforms are needed to preserve the 32-bit move. llvm-svn: 259676
* [ARM] Move GNUEABI divmod to __aeabi_divmod*Renato Golin2016-02-031-2/+4
| | | | | | | | | | The GNU toolchain emits __aeabi_divmod for soft-divide on ARM cores which happens to be a lot faster than __divsi3/__modsi3 when the core has hardware divide instructions. Do the same here. Fixes PR26450. llvm-svn: 259657
* Removed FeatureVFPOnlySP from the Cortex-R7 processor modelSjoerd Meijer2016-02-021-1/+0
| | | | | | | | | description and changed the regression test accordingly. The default configuration of a Cortex-R7 is to implement the VFPv3-D16 architecture and the feature line as it was is too restrictive. llvm-svn: 259480
* Avoid overly large SmallPtrSet/SmallSetMatthias Braun2016-01-301-1/+1
| | | | | | | These sets perform linear searching in small mode so it is never a good idea to use SmallSize/N bigger than 32. llvm-svn: 259283
* Annotate dump() methods with LLVM_DUMP_METHOD, addressing Richard Smith ↵Yaron Keren2016-01-291-1/+1
| | | | | | | | r259192 post commit comment. clang part in r259232, this is the LLVM part of the patch. llvm-svn: 259240
* ARM: don't mangle DAG constant if it has more than one useTim Northover2016-01-291-2/+2
| | | | | | | | | | | | | | | | The basic optimisation was to convert (mul $LHS, $complex_constant) into roughly "(shl (mul $LHS, $simple_constant), $simple_amt)" when it was expected to be cheaper. The original logic checks that the mul only has one use (since we're mangling $complex_constant), but when used in even more complex addressing modes there may be an outer addition that can pick up the wrong value too. I *think* the ARM addressing-mode problem is actually unreachable at the moment, but that depends on complex assessments of the profitability of pre-increment addressing modes so I've put a real check in there instead of an assertion. llvm-svn: 259228
* [ARM] Emit trap instruction using .inst directiveAlexandros Lamprineas2016-01-291-6/+5
| | | | | | | | | | The trap instruction is emitted as a data-in-text rather than an instruction. This patch uses the .inst directive for emitting trap. Differential Revision: http://reviews.llvm.org/D16684 llvm-svn: 259182
* ARMv7k: base ABI decision on v7k Arch rather than watchos OS.Tim Northover2016-01-275-6/+7
| | | | | | | | Various bits we want to use the new ABI actually compile with "-arch armv7k -miphoneos-version-min=9.0". Not ideal, but also not ridiculous given how slices work. llvm-svn: 258975
* One more batch of self-containing headers.Benjamin Kramer2016-01-272-1/+1
| | | | llvm-svn: 258974
* Don't put classes in headers into anonymous namespaces.Benjamin Kramer2016-01-274-9/+9
| | | | | | You want ODR violations? That's how you get ODR violations. llvm-svn: 258973
* Make more headers self-contained.Benjamin Kramer2016-01-271-0/+3
| | | | | | A lot of this comes from the new complete type requirement of DenseMap. llvm-svn: 258956
* Rename TargetSelectionDAGInfo into SelectionDAGTargetInfo and move it to ↵Benjamin Kramer2016-01-271-3/+3
| | | | | | | | CodeGen/ It's a SelectionDAG thing, not a Target thing. llvm-svn: 258939
* Move MCTargetAsmParser.h to llvm/MC/MCParser where it belongs.Benjamin Kramer2016-01-271-2/+2
| | | | llvm-svn: 258917
* Remove autoconf supportChris Bieneman2016-01-266-101/+0
| | | | | | | | | | | | | | | | Summary: This patch is provided in preparation for removing autoconf on 1/26. The proposal to remove autoconf on 1/26 was discussed on the llvm-dev thread here: http://lists.llvm.org/pipermail/llvm-dev/2016-January/093875.html "I felt a great disturbance in the [build system], as if millions of [makefiles] suddenly cried out in terror and were suddenly silenced. I fear something [amazing] has happened." - Obi Wan Kenobi Reviewers: chandlerc, grosbach, bob.wilson, tstellarAMD, echristo, whitequark Subscribers: chfast, simoncook, emaste, jholewinski, tberghammer, jfb, danalbert, srhines, arsenm, dschuff, jyknight, dsanders, joker.eph, llvm-commits Differential Revision: http://reviews.llvm.org/D16471 llvm-svn: 258861
* Reflect the MC/MCDisassembler split on the include/ level.Benjamin Kramer2016-01-263-3/+3
| | | | | | No functional change, just moving code around. llvm-svn: 258818
* [ARM] Add DSP build attribute and extension targetingBradley Smith2016-01-251-0/+3
| | | | | | | | This patch was originally committed as r257885, but was reverted due to windows failures. The cause of these failures has been fixed under r258677, hence re-committing the original patch. llvm-svn: 258683
* [ARM] Add new system registers to ARMv8-M Baseline/MainlineBradley Smith2016-01-254-7/+112
| | | | | | | | This patch was originally committed as r257884, but was reverted due to windows failures. The cause of these failures has been fixed under r258677, hence re-committing the original patch. llvm-svn: 258682
* [ARM] Add ARMv8-M security extension instructions to ARMv8-M Baseline/MainlineBradley Smith2016-01-258-1/+95
| | | | | | | | This patch was originally committed as r257883, but was reverted due to windows failures. The cause of these failures has been fixed under r258677, hence re-committing the original patch. llvm-svn: 258681
* [ARM] Add ARMv8.2-A FP16 scalar instructionsOliver Stannard2016-01-2512-6/+784
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This was originally committed as r255762, but reverted as it broke windows bots. Re-commitiing the exact same patch, as the underlying cause was fixed by r258677. ARMv8.2-A adds 16-bit floating point versions of all existing VFP floating-point instructions. This is an optional extension, so all of these instructions require the FeatureFullFP16 subtarget feature. The assembly for these instructions uses S registers (AArch32 does not have H registers), but the instructions have ".f16" type specifiers rather than ".f32" or ".f64". The top 16 bits of each source register are ignored, and the top 16 bits of the destination register are set to zero. These instructions are mostly the same as the 32- and 64-bit versions, but they use coprocessor 9 rather than 10 and 11. Two new instructions, VMOVX and VINS, have been added to allow packing and extracting two 16-bit floats stored in the top and bottom halves of an S register. New fixup kinds have been added for the PC-relative load and store instructions, but no ELF relocations have been added as they have a range of 512 bytes. Differential Revision: http://reviews.llvm.org/D15038 llvm-svn: 258678
* [ARM] Operands for PKHTB alias should be swappedOliver Stannard2016-01-182-6/+6
| | | | | | | | | When the shift immediate is zero, PKHTB is an alias for PKHBT, but the order of the input operands needs to be swapped. Differential Revision: http://reviews.llvm.org/D16288 llvm-svn: 258044
* [opaque pointer types] [NFC] CallSite: use getFunctionType() instead of ↵Manuel Jacob2016-01-171-2/+1
| | | | | | | | | | | | | | going through PointerType::getElementType. Patch by Eduard Burtescu. Reviewers: dblaikie, mjacob Subscribers: dsanders, llvm-commits, dblaikie Differential Revision: http://reviews.llvm.org/D16273 llvm-svn: 258023
* CXX_FAST_TLS calling convention: fix issue on ARM.Manman Ren2016-01-151-4/+5
| | | | | | | | | | When we have a single basic block, the explicit copy-back instructions should be inserted right before the terminator. Before this fix, they were wrongly placed at the beginning of the basic block. PR26136 llvm-svn: 257930
* Revert "[ARM] Add ARMv8-M security extension instructions to ARMv8-M ↵Reid Kleckner2016-01-158-94/+1
| | | | | | | | | | Baseline/Mainline" This reverts commit r257883. Somehow this didn't make it into r257916. llvm-svn: 257919
* # This is a combination of 2 commits.Reid Kleckner2016-01-155-115/+7
| | | | | | | | | | | | | | | | # The first commit's message is: Revert "[ARM] Add DSP build attribute and extension targeting" This reverts commit b11cc50c0b4a7c8cdb628abc50b7dc226ff583dc. # This is the 2nd commit message: Revert "[ARM] Add new system registers to ARMv8-M Baseline/Mainline" This reverts commit 837d08454e3e5beb8581951ac26b22fa07df3cd5. llvm-svn: 257916
* [ARM] Add DSP build attribute and extension targetingBradley Smith2016-01-151-0/+3
| | | | llvm-svn: 257885
* [ARM] Add new system registers to ARMv8-M Baseline/MainlineBradley Smith2016-01-154-7/+112
| | | | llvm-svn: 257884
* [ARM] Add ARMv8-M security extension instructions to ARMv8-M Baseline/MainlineBradley Smith2016-01-158-1/+94
| | | | llvm-svn: 257883
* [ARM] Add ARMv8-A semaphore/atomic instructions to ARMv8-M Baseline/MainlineBradley Smith2016-01-155-14/+25
| | | | llvm-svn: 257882
* [ARM] Add B.W and CBZ instructions to ARMv8-M BaselineBradley Smith2016-01-155-11/+23
| | | | llvm-svn: 257881
* [ARM] Add SDIV/UDIV instructions to ARMv8-M BaselineBradley Smith2016-01-152-4/+5
| | | | llvm-svn: 257880
* [ARM] Add MOVW/MOVT instructions to ARMv8-M Baseline/MainlineBradley Smith2016-01-153-12/+15
| | | | llvm-svn: 257879
* [ARM] Add ARMv8-M Baseline/Mainline LLVM targetingBradley Smith2016-01-156-5/+59
| | | | llvm-svn: 257878
* [ARM] Split out ARMv8-A semaphores and atomics and ARMv7 clrex as separate ↵Bradley Smith2016-01-156-22/+53
| | | | | | features llvm-svn: 257877
* Update to use new name alignTo().Rui Ueyama2016-01-142-2/+2
| | | | llvm-svn: 257804
* [ARM] Use the efficient version of BitVector::set and a static_assert.Benjamin Kramer2016-01-141-3/+2
| | | | | | No functional change intended. llvm-svn: 257766
* Convert a few assert failures into proper errors.Rafael Espindola2016-01-131-3/+3
| | | | | | Fixes PR25944. llvm-svn: 257697
* Guard fabs to bfc convert with V6T2 flagAna Pazos2016-01-131-2/+2
| | | | | | | | | | | | | | Summary: BFC instructions are available in ARMv6T2 and above. Reviewers: t.p.northover Subscribers: aemerson Differential Revision: http://reviews.llvm.org/D16076 llvm-svn: 257546
* [ARM] Mark VMOV with immediate: isAsCheapAsMove.Quentin Colombet2016-01-131-2/+5
| | | | | | | | | | VMOVs are not strictly speaking cheap, but they are as expensive as a vector copy (VORR), so we should prefer rematerialization over splitting when it applies. rdar://problem/23754176 llvm-svn: 257545
* [ARM] Fix several state persistence bugsKeno Fischer2016-01-122-4/+27
| | | | | | | | | | | | | | | | | | | | | | | Summary: This fixes three bugs, in all of which state is not or incorrecly reset between objects (i.e. when reusing the same pass manager to create multiple object files): 1) AttributeSection needs to be reset to nullptr, because otherwise the backend will try to emit into the old object file's attribute section causing a segmentation fault. 2) MappingSymbolCounter needs to be reset, otherwise the second object file will start where the first one left off. 3) The MCStreamer base class resets the Streamer's e_flags settings. Since EF_ARM_EABI_VER5 is set on streamer creation, we need to set it again after the MCStreamer was rest. Also rename Reset (uppser case) to EHReset to avoid confusion with reset (lower case). Reviewers: rengolin Differential Revision: http://reviews.llvm.org/D15950 llvm-svn: 257473
* CXX_FAST_TLS calling convention: performance improvement for ARM.Manman Ren2016-01-128-3/+101
| | | | | | | This is the same change on ARM as r255821 on AArch64. rdar://9001553 llvm-svn: 257424
* CXX_FAST_TLS calling convention: Add support for ARM on Darwin.Manman Ren2016-01-114-0/+16
| | | | | | rdar://9001553 llvm-svn: 257417
* RBIT Instruction only available for ARMv6t2 and above.Weiming Zhao2016-01-081-1/+1
| | | | | | | | | | | | | | | | | Summary: r255334 matches bit-reverse pattern in InstCombine and generates calls to Instrinsic::bitreverse. RBIT instruction is only available for ARMv6t2 and above. This patch has the intrinsic expanded during legalization for ARMv4 and ARMv5. Patch by Z. Zheng <zhaoshiz@codeaurora.org> Reviewers: apazos, jmolloy, weimingz Subscribers: aemerson, rengolin, llvm-commits Differential Revision: http://reviews.llvm.org/D15932 llvm-svn: 257188
* Disable shrink-wrap for Thumb1Weiming Zhao2016-01-081-0/+5
| | | | | | | | | | | | Summary: In ARMConstantIslandPass, which runs after Shrink Wrap pass, long jumps will be fixed up as BL (tBfar) which depends on spilling LR in epilogue. However, shrink-wrap may remove the LR, which causes issues when the function returns. Reviewers: qcolombet, rengolin Subscribers: aemerson, rengolin Differential Revision: http://reviews.llvm.org/D15984 llvm-svn: 257187
* Add some testing for thumb1 and thumb2 inline asm immediate constraintsEric Christopher2016-01-081-2/+2
| | | | | | | | and fix a couple of bugs on inspection. Also fixes PR26061. llvm-svn: 257122
* ARM: support TLS accesses on Darwin platformsTim Northover2016-01-0710-8/+132
| | | | | | | | Darwin TLS accesses most closely resemble ELF's general-dynamic situation, since they have to be able to handle all possible situations. The descriptors and so on are obviously slightly different though. llvm-svn: 257039
* Extract helper function to merge MemoryOperand lists [NFC]Philip Reames2016-01-061-19/+2
| | | | | | | | | | In the discussion on http://reviews.llvm.org/D15730, Andy pointed out we had a utility function for merging MMO lists. Since it turned we actually had two copies and there's another review in progress (http://reviews.llvm.org/D15230) which needs the same, extract it into a utility function and clean up the interfaces to make it easier to use with a MachineInstBuilder. I introduced a pair here to track size and allocation together. I think we should probably move in the direction of the MachineOperandsRef helper class, but I'm leaving that for further work. I want to get the poison state introduced before I make major changes to the interface. Differential Revision: http://reviews.llvm.org/D15757 llvm-svn: 256909
* [AArch64] Add support for Samsung Exynos-M1MinSeong Kim2016-01-052-1/+9
| | | | | | | | Adds core tuning support for new Samsung Exynos-M1 core (ARMv8-A). Differential Revision: http://reviews.llvm.org/D15663 llvm-svn: 256828
* Use std::is_sorted and std::none_of instead of manual loops. NFCCraig Topper2016-01-031-6/+6
| | | | llvm-svn: 256719
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