| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | ARM TAI no longer needs a TM, but createTargetAsmInfo() still does. | Chris Lattner | 2009-08-02 | 3 | -22/+11 |
| | | | | | llvm-svn: 77878 | ||||
| * | Move the getInlineAsmLength virtual method from TAI to TII, where | Chris Lattner | 2009-08-02 | 8 | -175/+173 |
| | | | | | | | | | | | the only real caller (GetFunctionSizeInBytes) uses it. The custom ARM implementation of this is basically reimplementing an assembler poorly for negligible gain. It should be removed IMNSHO, but I'll leave that to ARMish folks to decide. llvm-svn: 77877 | ||||
| * | turn some templated inline functions into static functions. | Chris Lattner | 2009-08-02 | 2 | -14/+11 |
| | | | | | llvm-svn: 77873 | ||||
| * | remove the dead ELFTargetAsmInfo.h/cpp file. TargetAsmInfo | Chris Lattner | 2009-08-02 | 1 | -1/+0 |
| | | | | | | | defaults to being ELF. llvm-svn: 77866 | ||||
| * | remove TargetAsmInfo::TM, which is now dead. The basic TAI class now | Chris Lattner | 2009-08-02 | 2 | -3/+3 |
| | | | | | | | no longer depends on TM! llvm-svn: 77863 | ||||
| * | convert ctors/dtors section to be in TLOF instead of | Chris Lattner | 2009-08-02 | 3 | -9/+40 |
| | | | | | | | TAI. llvm-svn: 77842 | ||||
| * | REmove dead fields of TAI. | Chris Lattner | 2009-08-01 | 2 | -2/+0 |
| | | | | | llvm-svn: 77820 | ||||
| * | Workaround a couple of Darwin assembler bugs. | Evan Cheng | 2009-08-01 | 3 | -31/+71 |
| | | | | | llvm-svn: 77781 | ||||
| * | Split t2MOVCCs since some assemblers do not recognize mov shifted register ↵ | Evan Cheng | 2009-08-01 | 2 | -8/+29 |
| | | | | | | | alias with predicate. llvm-svn: 77764 | ||||
| * | Fix Thumb2 function call isel. Thumb1 and Thumb2 should share the same | Evan Cheng | 2009-08-01 | 5 | -72/+40 |
| | | | | | | | | | | instructions for calls since BL and BLX are always 32-bit long and BX is always 16-bit long. Also, we should be using BLX to call external function stubs. llvm-svn: 77756 | ||||
| * | t2BR_JT is mov pc, it's 2 byte long, not 4. | Evan Cheng | 2009-07-31 | 1 | -9/+9 |
| | | | | | llvm-svn: 77744 | ||||
| * | Thumb2 movcc need .w suffix. | Evan Cheng | 2009-07-31 | 1 | -3/+3 |
| | | | | | llvm-svn: 77743 | ||||
| * | switch off of 'Section' onto MCSection. We're not properly using | Chris Lattner | 2009-07-31 | 1 | -1/+2 |
| | | | | | | | MCSection subclasses yet, but this is a step in the right direction. llvm-svn: 77708 | ||||
| * | Until we have a "ALIGN" pseudo instruction, have asm printer emitted a .align | Evan Cheng | 2009-07-31 | 1 | -0/+7 |
| | | | | | | | | | to ensure the instruction that follows a TBB (when the number of table entries is odd) is 2-byte aligned. Patch by Sandeep Patel. llvm-svn: 77705 | ||||
| * | - Teach TBB / TBH offset limits are 510 and 131070 respectively since the offset | Evan Cheng | 2009-07-31 | 2 | -9/+14 |
| | | | | | | | | is scaled by two. - Teach GetInstSizeInBytes about TBB and TBH. llvm-svn: 77701 | ||||
| * | refactor section construction in TLOF to be through an explicit | Chris Lattner | 2009-07-31 | 1 | -1/+1 |
| | | | | | | | initialize method, which can be called when an MCContext is available. llvm-svn: 77687 | ||||
| * | When fp is not eliminated, instructions with T2_i12 modes will be changed to ↵ | Evan Cheng | 2009-07-30 | 2 | -3/+10 |
| | | | | | | | T2_i8 ones. Take that into consideration when determining stack size limit for reserving register scavenging slot. llvm-svn: 77642 | ||||
| * | Remove redundant match for frame index from imm8 addrmode, it is handled by ↵ | David Goodwin | 2009-07-30 | 1 | -24/+14 |
| | | | | | | | the imm12 addrmode. llvm-svn: 77632 | ||||
| * | Darwin assembler now recognizes "orn", so remove workaround. | David Goodwin | 2009-07-30 | 1 | -5/+3 |
| | | | | | llvm-svn: 77627 | ||||
| * | Darwin assembler now supports "rrx", so remove workaround. | David Goodwin | 2009-07-30 | 1 | -2/+1 |
| | | | | | llvm-svn: 77625 | ||||
| * | Cleanup and include code selection for some frame index cases. | David Goodwin | 2009-07-30 | 1 | -20/+49 |
| | | | | | llvm-svn: 77622 | ||||
| * | Add missing D* register clobbers for Thumb-2 call. | David Goodwin | 2009-07-30 | 1 | -0/+1 |
| | | | | | llvm-svn: 77611 | ||||
| * | add a random codegen deficiency. | Chris Lattner | 2009-07-30 | 1 | -0/+46 |
| | | | | | llvm-svn: 77598 | ||||
| * | Switch obvious clients to Twine instead of utostr (when they were already using | Daniel Dunbar | 2009-07-30 | 1 | -2/+1 |
| | | | | | | | | | | a Twine, e.g., for names). - I am a little ambivalent about this; we don't want the string conversion of utostr, but using overload '+' mixed with string and integer arguments is sketchy. On the other hand, this particular usage is something of an idiom. llvm-svn: 77579 | ||||
| * | Lower a 128-bit BUILD_VECTOR with 2 elements to a pair of INSERT_VECTOR_ELTs. | Bob Wilson | 2009-07-30 | 1 | -1/+19 |
| | | | | | llvm-svn: 77557 | ||||
| * | tbb / tbh instructions only branch forward, not backwards. | Evan Cheng | 2009-07-29 | 1 | -2/+4 |
| | | | | | llvm-svn: 77522 | ||||
| * | Add VFP3 D registers to the DPR register class. | Evan Cheng | 2009-07-29 | 1 | -1/+3 |
| | | | | | llvm-svn: 77521 | ||||
| * | Make sure Thumb2 uses the right call instructions. | Evan Cheng | 2009-07-29 | 3 | -19/+80 |
| | | | | | llvm-svn: 77507 | ||||
| * | Give getPointerRegClass() a "kind" value so that targets can | Chris Lattner | 2009-07-29 | 2 | -6/+7 |
| | | | | | | | support multiple different pointer register classes. llvm-svn: 77501 | ||||
| * | - Fix an obvious copy and paste error. | Evan Cheng | 2009-07-29 | 3 | -6/+7 |
| | | | | | | | - Darwin Thumb2 call clobbers r9. llvm-svn: 77500 | ||||
| * | Change Neon VLDn intrinsics to return multiple values instead of really | Bob Wilson | 2009-07-29 | 1 | -26/+26 |
| | | | | | | | | wide vectors. Likewise, change VSTn intrinsics to take separate arguments for each vector in a multi-vector struct. Adjust tests accordingly. llvm-svn: 77468 | ||||
| * | pass the mangler down into the various SectionForGlobal methods. | Chris Lattner | 2009-07-29 | 1 | -2/+3 |
| | | | | | | | No functionality change. llvm-svn: 77432 | ||||
| * | Optimize Thumb2 jumptable to use tbb / tbh when all the offsets fit in byte ↵ | Evan Cheng | 2009-07-29 | 7 | -44/+204 |
| | | | | | | | / halfword. llvm-svn: 77422 | ||||
| * | Thumb-2: fix typo that caused incorrect stack elimination for VFP operations ↵ | David Goodwin | 2009-07-28 | 1 | -1/+1 |
| | | | | | | | and very large stack frames. llvm-svn: 77401 | ||||
| * | Rename MDNode.h header. It defines MDnode and other metadata classes. | Devang Patel | 2009-07-28 | 1 | -1/+1 |
| | | | | | | | New name is Metadata.h. llvm-svn: 77370 | ||||
| * | In thumb2 mode, add pc is unpredictable. Use add + mov pc instead (that is ↵ | Evan Cheng | 2009-07-28 | 5 | -18/+7 |
| | | | | | | | until more optimization goes in). llvm-svn: 77364 | ||||
| * | Remove support for ORN to workaround <rdar://problem/7096522>. | David Goodwin | 2009-07-28 | 1 | -3/+5 |
| | | | | | llvm-svn: 77363 | ||||
| * | more simplifications and cleanup. :) | Chris Lattner | 2009-07-28 | 1 | -18/+17 |
| | | | | | llvm-svn: 77350 | ||||
| * | Add workaround for <rdar://problem/7098328>. | David Goodwin | 2009-07-28 | 1 | -1/+2 |
| | | | | | llvm-svn: 77340 | ||||
| * | the apple "ld_classic" linker doesn't support .literal16 in 32-bit | Chris Lattner | 2009-07-28 | 1 | -1/+1 |
| | | | | | | | | mode, and "ld64" (the default linker) falls back to it in -static mode. llvm-svn: 77334 | ||||
| * | Add Thumb-2 patterns for ARMsrl_flag and ARMsra_flag. | David Goodwin | 2009-07-28 | 1 | -1/+10 |
| | | | | | llvm-svn: 77329 | ||||
| * | tADDrSPI doesn't have a predicate operand, but tADDhirr and tADDi3 have. | Evan Cheng | 2009-07-28 | 1 | -0/+5 |
| | | | | | llvm-svn: 77305 | ||||
| * | Code clean up. No functionality changes. | Evan Cheng | 2009-07-28 | 1 | -21/+32 |
| | | | | | llvm-svn: 77301 | ||||
| * | - More refactoring. This gets rid of all of the getOpcode calls. | Evan Cheng | 2009-07-28 | 16 | -566/+607 |
| | | | | | | | | | | | | - This change also makes it possible to switch between ARM / Thumb on a per-function basis. - Fixed thumb2 routine which expand reg + arbitrary immediate. It was using using ARM so_imm logic. - Use movw and movt to do reg + imm when profitable. - Other code clean ups and minor optimizations. llvm-svn: 77300 | ||||
| * | Rip all of the global variable lowering logic out of TargetAsmInfo. Since | Chris Lattner | 2009-07-28 | 3 | -6/+12 |
| | | | | | | | | | | | | | | | | | | | | | it is highly specific to the object file that will be generated in the end, this introduces a new TargetLoweringObjectFile interface that is implemented for each of ELF/MachO/COFF/Alpha/PIC16 and XCore. Though still is still a brutal and ugly refactoring, this is a major step towards goodness. This patch also: 1. fixes a bunch of dangling pointer problems in the PIC16 backend. 2. disables the TargetLowering copy ctor which PIC16 was accidentally using. 3. gets us closer to xcore having its own crazy target section flags and pic16 not having to shadow sections with its own objects. 4. fixes wierdness where ELF targets would set CStringSection but not CStringSection_. Factor the code better. 5. fixes some bugs in string lowering on ELF targets. llvm-svn: 77294 | ||||
| * | ORN does not require (and can not have) the ".w" suffix. "Orthogonality" is ↵ | David Goodwin | 2009-07-27 | 1 | -7/+13 |
| | | | | | | | a dirty word at ARM. llvm-svn: 77275 | ||||
| * | Remove TPat. No patterns depend on just isThumb(). Must use either T1Pat ↵ | David Goodwin | 2009-07-27 | 2 | -30/+26 |
| | | | | | | | (isThumb1Only()) or T2Pat (is Thumb2). llvm-svn: 77242 | ||||
| * | remove dead code. | Chris Lattner | 2009-07-27 | 2 | -6/+3 |
| | | | | | llvm-svn: 77233 | ||||
| * | More DCE. | Evan Cheng | 2009-07-27 | 4 | -17/+1 |
| | | | | | llvm-svn: 77231 | ||||
| * | convertToThreeAddress can't handle Thumb2 instructions (which don't have ↵ | Evan Cheng | 2009-07-27 | 1 | -10/+7 |
| | | | | | | | same address mode as ARM instructions). llvm-svn: 77230 | ||||

