| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Simplify the encoding of reg+/-imm12 values that allow PC-relative encoding. ↵ | Owen Anderson | 2010-11-30 | 4 | -88/+16 |
| | | | | | | | | | | This allows the Thumb2 encoding to share code with the ARM encoding, which gets use fixup support for free. It also allows us to fold away at least one codegen-only pattern. llvm-svn: 120481 | ||||
| * | Fix handling of ARM negative pc-relative fixups for loads and stores. | Jim Grosbach | 2010-11-30 | 2 | -9/+36 |
| | | | | | llvm-svn: 120480 | ||||
| * | Provide Thumb2 encodings for a few miscellaneous instructions. | Owen Anderson | 2010-11-30 | 1 | -8/+22 |
| | | | | | llvm-svn: 120455 | ||||
| * | Add FIXME | Jim Grosbach | 2010-11-30 | 1 | -0/+1 |
| | | | | | llvm-svn: 120451 | ||||
| * | Add encoding support for Thumb2 PLD and PLI instructions. | Owen Anderson | 2010-11-30 | 3 | -1/+43 |
| | | | | | llvm-svn: 120449 | ||||
| * | Noticed this on inspection, fix and update some comments. | Eric Christopher | 2010-11-30 | 1 | -3/+4 |
| | | | | | llvm-svn: 120447 | ||||
| * | Pseudo-ize ARM MOVPCRX | Jim Grosbach | 2010-11-30 | 2 | -8/+19 |
| | | | | | llvm-svn: 120442 | ||||
| * | Provide encodings for a few more load/store variants. | Owen Anderson | 2010-11-30 | 1 | -4/+16 |
| | | | | | llvm-svn: 120439 | ||||
| * | Pseudo-ize BX_CALL and friends. Remove dead instruction format classes. | Jim Grosbach | 2010-11-30 | 3 | -46/+66 |
| | | | | | | | rdar://8685712 llvm-svn: 120438 | ||||
| * | Add parsing for the Thumb t_addrmode_s4 addressing mode. This can almost | Bill Wendling | 2010-11-30 | 4 | -14/+89 |
| | | | | | | | | | | | certainly be made more generic. But it does allow us to parse something like: ldr r3, [r2, r4] correctly in Thumb mode. llvm-svn: 120408 | ||||
| * | Minor cleanups. No functional change. | Bill Wendling | 2010-11-30 | 1 | -24/+23 |
| | | | | | llvm-svn: 120372 | ||||
| * | s/ARM::BRIND/ARM::BX/g to coincide with r120366. | Bill Wendling | 2010-11-30 | 3 | -5/+5 |
| | | | | | llvm-svn: 120371 | ||||
| * | Add correct encoding for "bl __aeabi_read_tp". However, the asm matcher isn't | Bill Wendling | 2010-11-30 | 1 | -3/+5 |
| | | | | | | | able to match this yet. llvm-svn: 120369 | ||||
| * | Rename BX/BRIND/etc patterns to clarify which is actually the BX instruction | Jim Grosbach | 2010-11-30 | 2 | -9/+9 |
| | | | | | | | and which are pseudos. llvm-svn: 120366 | ||||
| * | Add some encoding for the adr instruction. Labels still need to be finished. | Bill Wendling | 2010-11-30 | 1 | -6/+16 |
| | | | | | llvm-svn: 120365 | ||||
| * | Correct Thumb2 encodings for a much wider range of loads and stores. | Owen Anderson | 2010-11-30 | 4 | -48/+96 |
| | | | | | llvm-svn: 120364 | ||||
| * | Make a few more ARM pseudo instructions actually use the PseudoInst base class. | Jim Grosbach | 2010-11-30 | 1 | -14/+13 |
| | | | | | llvm-svn: 120362 | ||||
| * | Predicate encoding should be withing {}s. And general cleanup. | Bill Wendling | 2010-11-30 | 2 | -8/+4 |
| | | | | | llvm-svn: 120361 | ||||
| * | Predicate encoding should be withing {}s. | Bill Wendling | 2010-11-30 | 1 | -2/+2 |
| | | | | | llvm-svn: 120360 | ||||
| * | Fix the encoding of VLD4-dup alignment. | Bob Wilson | 2010-11-30 | 4 | -37/+67 |
| | | | | | | | | | The only reasonable way I could find to do this is to provide an alternate version of the addrmode6 operand with a different encoding function. Use it for all the VLD-dup instructions for the sake of consistency. llvm-svn: 120358 | ||||
| * | Rename VLDnDUP instructions with double-spaced registers | Bob Wilson | 2010-11-30 | 1 | -12/+12 |
| | | | | | | | in an attempt to make things a little more consistent. llvm-svn: 120357 | ||||
| * | Add support for NEON VLD3-dup instructions. | Bob Wilson | 2010-11-30 | 6 | -1/+104 |
| | | | | | | | The encoding for alignment in VLD4-dup instructions is still a work in progress. llvm-svn: 120356 | ||||
| * | Simplify definitions of the ARM eh.sjlj.*jmp pseudo instructions. | Jim Grosbach | 2010-11-29 | 1 | -9/+6 |
| | | | | | llvm-svn: 120354 | ||||
| * | Parameterize ARMPseudoInst size property. | Jim Grosbach | 2010-11-29 | 2 | -27/+19 |
| | | | | | llvm-svn: 120353 | ||||
| * | Add a few missing initializers. | Jim Grosbach | 2010-11-29 | 1 | -2/+2 |
| | | | | | llvm-svn: 120350 | ||||
| * | Nuke trailing whitespace. | Jim Grosbach | 2010-11-29 | 1 | -3/+3 |
| | | | | | llvm-svn: 120344 | ||||
| * | Nuke a FIXME. No need to be fancier here, as ARM handles constant pools | Jim Grosbach | 2010-11-29 | 1 | -5/+1 |
| | | | | | | | locations and formatting specially. rdar://7353441 llvm-svn: 120343 | ||||
| * | Provide Thumb2 encodings for basic loads and stores. | Owen Anderson | 2010-11-29 | 3 | -21/+136 |
| | | | | | llvm-svn: 120340 | ||||
| * | Mark Darwin call instructions as using "r7" to prevent the frame-register | Evan Cheng | 2010-11-29 | 3 | -12/+27 |
| | | | | | | | | assignment instructions from being moved below / above calls. rdar://8690640 llvm-svn: 120339 | ||||
| * | Nuke dead isCodeGenOnly annotation and extraneous comment. | Jim Grosbach | 2010-11-29 | 1 | -3/+2 |
| | | | | | llvm-svn: 120338 | ||||
| * | tidy up. | Jim Grosbach | 2010-11-29 | 1 | -2/+1 |
| | | | | | llvm-svn: 120335 | ||||
| * | Thumb encodings for conditional moves. | Bill Wendling | 2010-11-29 | 1 | -2/+14 |
| | | | | | llvm-svn: 120334 | ||||
| * | Pseudo-ize Thumb2 jump tables with explicit MC lowering to the raw | Jim Grosbach | 2010-11-29 | 7 | -154/+71 |
| | | | | | | | instructions. This simplifies instruction printing and disassembly. llvm-svn: 120333 | ||||
| * | Refactor some of the "disassembly-only" instructions into a base class. This | Bill Wendling | 2010-11-29 | 1 | -36/+21 |
| | | | | | | | reduces some code duplication. llvm-svn: 120326 | ||||
| * | Update fastisel for the changes in r120272. | Eric Christopher | 2010-11-29 | 1 | -3/+7 |
| | | | | | llvm-svn: 120324 | ||||
| * | Rename t2 TBB and TBH instructions to reference that they encode the jump table | Jim Grosbach | 2010-11-29 | 5 | -14/+14 |
| | | | | | | | data. Next up, pseudo-izing them. llvm-svn: 120320 | ||||
| * | Improving the factoring of several instruction encodings. | Owen Anderson | 2010-11-29 | 1 | -89/+51 |
| | | | | | llvm-svn: 120317 | ||||
| * | Add support for NEON VLD3-dup instructions. | Bob Wilson | 2010-11-29 | 6 | -0/+93 |
| | | | | | llvm-svn: 120312 | ||||
| * | Fix copy-and-paste errors in VLD2-dup scheduling itineraries. | Bob Wilson | 2010-11-29 | 2 | -4/+4 |
| | | | | | llvm-svn: 120311 | ||||
| * | ARM Pseudo-ize tBR_JTr. | Jim Grosbach | 2010-11-29 | 5 | -28/+19 |
| | | | | | llvm-svn: 120310 | ||||
| * | Thumb2 encodings for MSR and MRS. | Owen Anderson | 2010-11-29 | 1 | -10/+24 |
| | | | | | llvm-svn: 120309 | ||||
| * | Thumb2 encodings for system instructions. | Owen Anderson | 2010-11-29 | 1 | -8/+50 |
| | | | | | llvm-svn: 120307 | ||||
| * | Thumb2 encodings for branches and IT blocks. | Owen Anderson | 2010-11-29 | 1 | -0/+15 |
| | | | | | llvm-svn: 120306 | ||||
| * | The ARM BR_JT* pseudos don't need to use the printer jtblock_operand node to | Jim Grosbach | 2010-11-29 | 1 | -4/+4 |
| | | | | | | | get the pretty-printer. That's handled explicityly by the MC lowering now. llvm-svn: 120305 | ||||
| * | I swear I did a make clean and make before committing all this... | Michael J. Spencer | 2010-11-29 | 1 | -1/+1 |
| | | | | | llvm-svn: 120304 | ||||
| * | Switch ARM BR_JTm and BR_JTr instructions to be MC-expanded pseudos. | Jim Grosbach | 2010-11-29 | 3 | -43/+95 |
| | | | | | llvm-svn: 120303 | ||||
| * | Add more Thumb encodings. | Bill Wendling | 2010-11-29 | 1 | -12/+30 |
| | | | | | llvm-svn: 120279 | ||||
| * | More Thumb encodings. | Bill Wendling | 2010-11-29 | 1 | -24/+76 |
| | | | | | llvm-svn: 120278 | ||||
| * | Add Thumb encodings for REV instructions. | Bill Wendling | 2010-11-29 | 1 | -19/+37 |
| | | | | | llvm-svn: 120277 | ||||
| * | Add more Thumb encodings. | Bill Wendling | 2010-11-29 | 1 | -24/+58 |
| | | | | | llvm-svn: 120272 | ||||

