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* Refactor PICSTR* instructions to really be pseudos. Nuke dead classes.Jim Grosbach2010-11-192-52/+6
| | | | llvm-svn: 119841
* Rename ARM .td class AIldst1 to AI2ldst for consistency with the other classes.Jim Grosbach2010-11-192-7/+7
| | | | llvm-svn: 119840
* Add ARM binary encoding information for the rest of the indexed loads.Jim Grosbach2010-11-192-175/+63
| | | | llvm-svn: 119821
* Remove dead code.Jim Grosbach2010-11-191-10/+0
| | | | llvm-svn: 119815
* ARM LDRD binary encoding.Jim Grosbach2010-11-192-22/+12
| | | | llvm-svn: 119812
* Remove hard tabs.Jim Grosbach2010-11-191-2/+2
| | | | llvm-svn: 119810
* Remove trailing whitespace.Jim Grosbach2010-11-191-62/+62
| | | | llvm-svn: 119806
* Avoid release build warnings.Benjamin Kramer2010-11-192-4/+4
| | | | llvm-svn: 119804
* Fix decoding ambiguities of stdrex and ldrex.Owen Anderson2010-11-191-4/+0
| | | | llvm-svn: 119801
* These instructions are thumb2 only.Evan Cheng2010-11-191-1/+1
| | | | llvm-svn: 119793
* Fix an obvious oversight.Evan Cheng2010-11-191-2/+2
| | | | llvm-svn: 119792
* Add MC encodings for some Thumb instructions. Test for a few of them. The "bxBill Wendling2010-11-191-17/+48
| | | | | | | lr" instruction cannot be tested just yet. It requires matching a "condition code", but adding one of those makes things go south quickly... llvm-svn: 119774
* Use array_pod_sort because the list is contiguous.Bill Wendling2010-11-191-1/+1
| | | | llvm-svn: 119769
* Provide Thumb2 encodings for strex and ldrex.Owen Anderson2010-11-191-20/+42
| | | | llvm-svn: 119768
* Minor cleanups to a few llvm_unreachable() calls.Jim Grosbach2010-11-193-14/+8
| | | | llvm-svn: 119767
* An 'unreachable' shouldn't have a '0 &&' prefix.Bill Wendling2010-11-191-2/+2
| | | | llvm-svn: 119762
* Add support for parsing the writeback ("!") token.Bill Wendling2010-11-181-65/+80
| | | | llvm-svn: 119761
* Fix .o emission of ARM movt/movw. MCSymbolRefExpr::VK_ARM_(HI||LO)16 for the ↵Jason W Kim2010-11-185-5/+68
| | | | | | | | | .o path now works for ARM. Note: lo16AllZero remains in ARMInstrInfo.td - It can be factored out when Thumb movt is repaired. Existing tests cover this update. llvm-svn: 119760
* Fix encodings for pkhbt, and fix some tests where I accidentally tested ARM ↵Owen Anderson2010-11-181-6/+6
| | | | | | mode instead of Thumb2. llvm-svn: 119755
* ARM Encoding information for UXTAH and friends.Jim Grosbach2010-11-181-0/+12
| | | | llvm-svn: 119753
* Fix bug in DAGCombiner for ARM that was trying to do a ShiftCombine on ↵Tanya Lattner2010-11-181-1/+2
| | | | | | | | illegal types (vector should be split first). Added test case. llvm-svn: 119749
* Don't allocate the SmallVector of Registers. It gets messy figuring out whoBill Wendling2010-11-181-13/+5
| | | | | | | should delete what when the object gets copied around. It's also making valgrind upset. llvm-svn: 119747
* Provide Thumb2 encodings for mov's that come from MOVCC SDNodes.Owen Anderson2010-11-181-12/+13
| | | | llvm-svn: 119744
* Add ARM encoding information for LDRH post-increment.Jim Grosbach2010-11-181-7/+13
| | | | llvm-svn: 119743
* Move hasFP() and few related hooks to TargetFrameInfo.Anton Korobeynikov2010-11-1810-86/+106
| | | | llvm-svn: 119740
* Split up ARM LowerShift function.Bob Wilson2010-11-181-26/+33
| | | | | | | | | | | | | This function was being called from two different places for completely unrelated reasons. During type legalization, it was called to expand 64-bit shift operations. During operation legalization, it was called to handle Neon vector shifts. The vector shift code was not written to check for illegal types, since it was assumed to be only called after type legalization. Fixed this by splitting off the 64-bit shift expansion into a separate function. I don't have a particular testcase for this; I just noticed it by inspection. llvm-svn: 119738
* More Thumb2 encodings.Owen Anderson2010-11-181-29/+40
| | | | llvm-svn: 119737
* Fill out the set of Thumb2 multiplication operator encodings.Owen Anderson2010-11-182-142/+155
| | | | llvm-svn: 119733
* Missed the _RET versions of LDMIA.Bill Wendling2010-11-181-0/+2
| | | | llvm-svn: 119726
* Rewrite stack callee saved spills and restores to use push/pop instructions.Eric Christopher2010-11-184-86/+189
| | | | | | | | | Remove movePastCSLoadStoreOps and associated code for simple pointer increments. Update routines that depended upon other opcodes for save/restore. Adjust all testcases accordingly. llvm-svn: 119725
* ARMPseudoInst instructions should default to being considered a single 4-byteJim Grosbach2010-11-181-0/+3
| | | | | | | instruction. Any that may be expanded otherwise by MC lowering should override this value. rdar://8683274 llvm-svn: 119713
* Silence compiler warnings.Evan Cheng2010-11-181-2/+2
| | | | llvm-svn: 119610
* Remove trailing whitespace.Jim Grosbach2010-11-181-45/+45
| | | | llvm-svn: 119608
* ARM PseudoInst instructions don't need or use an assembler string. Get rid ofJim Grosbach2010-11-185-56/+54
| | | | | | the operand to the pattern. llvm-svn: 119607
* Code clean up.Evan Cheng2010-11-181-6/+2
| | | | llvm-svn: 119604
* Add FIXME.Jim Grosbach2010-11-181-0/+3
| | | | llvm-svn: 119603
* Refactor the ARM PICADD and PICLDR* instructions to really be pseudos and notJim Grosbach2010-11-182-43/+26
| | | | | | just pretend to be. llvm-svn: 119602
* Try again at providing Thumb2 encodings for basic multiplication operators.Owen Anderson2010-11-181-26/+43
| | | | llvm-svn: 119601
* Refactor a few ARM load instructions to better parameterize things and re-useJim Grosbach2010-11-182-86/+22
| | | | | | common encoding information. llvm-svn: 119598
* Revert r119593 while I figure out my testing disagrees with the buildbot.Owen Anderson2010-11-181-43/+26
| | | | llvm-svn: 119597
* Provide correct Thumb2 encodings for basic multiplication operators.Owen Anderson2010-11-181-26/+43
| | | | llvm-svn: 119593
* Clean up LEApcrel instuction(s) a bit. It's not really a Pseudo, so don't markJim Grosbach2010-11-172-10/+24
| | | | | | it as such. Add some encoding information. llvm-svn: 119588
* Second attempt at correct encodings for Thumb2 bitfield instructions.Owen Anderson2010-11-171-13/+44
| | | | llvm-svn: 119575
* Fix comment typo.Jim Grosbach2010-11-171-1/+1
| | | | llvm-svn: 119573
* Change ARMGlobalMerge to keep BSS globals in separate pools.Bob Wilson2010-11-171-4/+10
| | | | | | This completes the fixes for Radar 8673120. llvm-svn: 119566
* Fix ARMGlobalMerge pass to check if globals are entirely within range.Bob Wilson2010-11-171-2/+5
| | | | | | | It is generally not sufficient to check if the starting offset is in range of the maximum offset that can be efficiently used for the target. llvm-svn: 119565
* Change the symbol for merged globals from "merged" to "_MergedGlobals".Bob Wilson2010-11-171-1/+1
| | | | | | | This makes it more clear that the symbol is an internal, compiler-generated name and gives a little more description about its contents. llvm-svn: 119564
* Fix the ARMGlobalMerge pass to look at variable sizes instead of pointer sizes.Bob Wilson2010-11-171-1/+1
| | | | | | | It was mistakenly looking at the pointer type when checking for the size of global variables. This is a partial fix for Radar 8673120. llvm-svn: 119563
* Make the ARM BR_JTadd instruction an explicit pseudo and lower it properlyJim Grosbach2010-11-172-12/+25
| | | | | | in the MC lowering process. llvm-svn: 119559
* Avoid isel movcc of large immediates when the large immediate is available ↵Evan Cheng2010-11-171-10/+14
| | | | | | in a register. These immediates aren't free. llvm-svn: 119558
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