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* implement load effective address similar to the alpha backendRafael Espindola2006-11-094-82/+15
| | | | | | remove lea_addri and the now unused memri addressing mode llvm-svn: 31592
* Match tblegen changes.Evan Cheng2006-11-081-10/+16
| | | | llvm-svn: 31571
* initial implementation of addressing mode 2Rafael Espindola2006-11-084-15/+72
| | | | | | TODO: fix lea_addri llvm-svn: 31552
* remove dead/redundant varsChris Lattner2006-11-031-3/+0
| | | | llvm-svn: 31435
* revert previous patchRafael Espindola2006-11-031-2/+0
| | | | llvm-svn: 31411
* add createCFGSimplificationPass to ARMTargetMachine::addInstSelectorRafael Espindola2006-11-031-0/+2
| | | | llvm-svn: 31400
* move ARMCondCodeToString to ARMAsmPrinter.cppRafael Espindola2006-11-023-23/+21
| | | | | | remove unused variables from lowerCall llvm-svn: 31378
* print null values in bssRafael Espindola2006-11-011-2/+4
| | | | llvm-svn: 31349
* implement zextload bool and truncstore boolRafael Espindola2006-11-011-0/+10
| | | | llvm-svn: 31348
* add support for calling functions when the caller has variable sized objectsRafael Espindola2006-10-311-1/+19
| | | | llvm-svn: 31312
* All targets expand BR_JT for now.Evan Cheng2006-10-301-1/+2
| | | | llvm-svn: 31294
* initial support for frame pointersRafael Espindola2006-10-263-5/+44
| | | | llvm-svn: 31197
* expand ISD::VACOPYRafael Espindola2006-10-241-0/+1
| | | | llvm-svn: 31170
* fix warning about missing newline at end of fileRafael Espindola2006-10-241-1/+1
| | | | llvm-svn: 31162
* implement uncond branch insertion, mark branches with isBranch.Chris Lattner2006-10-243-1/+13
| | | | llvm-svn: 31160
* implement STRB and STRHRafael Espindola2006-10-231-0/+8
| | | | llvm-svn: 31138
* expand ISD::MEMSETRafael Espindola2006-10-231-0/+3
| | | | llvm-svn: 31137
* For PR950:Reid Spencer2006-10-201-2/+1
| | | | | | | | This patch implements the first increment for the Signless Types feature. All changes pertain to removing the ConstantSInt and ConstantUInt classes in favor of just using ConstantInt. llvm-svn: 31063
* use Pat to implement extloadi8 and extloadi16Rafael Espindola2006-10-191-8/+5
| | | | llvm-svn: 31052
* implement undefRafael Espindola2006-10-191-0/+8
| | | | llvm-svn: 31049
* print common symbolsRafael Espindola2006-10-191-17/+33
| | | | llvm-svn: 31048
* implement extloadi8 and extloadi16Rafael Espindola2006-10-191-0/+8
| | | | llvm-svn: 31047
* expand SIGN_EXTEND_INREGRafael Espindola2006-10-191-0/+4
| | | | llvm-svn: 31046
* expand brind so that we don't have to implement jump tables right nowRafael Espindola2006-10-191-0/+1
| | | | llvm-svn: 31045
* add blxRafael Espindola2006-10-181-0/+1
| | | | llvm-svn: 31037
* add isTerminatortto b and bcondRafael Espindola2006-10-181-7/+9
| | | | llvm-svn: 31036
* implement CallingConv::Fast as CallingConv::CRafael Espindola2006-10-181-1/+3
| | | | llvm-svn: 31034
* expand ISD::SDIV, ISD::UDIV, ISD::SREM and ISD::UREMRafael Espindola2006-10-171-0/+4
| | | | llvm-svn: 31014
* add the FPUnaryOp and DFPUnaryOp classesRafael Espindola2006-10-171-15/+14
| | | | llvm-svn: 31013
* add FABSS and FABSDRafael Espindola2006-10-171-0/+8
| | | | llvm-svn: 31012
* remove extra [] in storesRafael Espindola2006-10-171-2/+2
| | | | llvm-svn: 31008
* initial implementation of addressing mode 5Rafael Espindola2006-10-173-10/+47
| | | | llvm-svn: 31002
* add the immediate to the Offset in eliminateFrameIndexRafael Espindola2006-10-171-2/+2
| | | | llvm-svn: 30998
* add FSTD and FSTSRafael Espindola2006-10-172-3/+12
| | | | llvm-svn: 30996
* add FCPYS and FCPYDRafael Espindola2006-10-172-3/+16
| | | | llvm-svn: 30995
* add fdivs e fdivdRafael Espindola2006-10-161-1/+2
| | | | llvm-svn: 30988
* expand ISD::SHL_PARTS, ISD::SRA_PARTS and ISD::SRL_PARTSRafael Espindola2006-10-163-8/+20
| | | | llvm-svn: 30987
* define the DFPBinOp classRafael Espindola2006-10-161-15/+10
| | | | llvm-svn: 30981
* add the FPBinOp classRafael Espindola2006-10-161-9/+8
| | | | llvm-svn: 30980
* define the Addr1BinOp classRafael Espindola2006-10-161-34/+14
| | | | llvm-svn: 30979
* define the IntBinOp class and use it to implement the multiply instructionsRafael Espindola2006-10-161-12/+13
| | | | llvm-svn: 30978
* fix assembly syntaxRafael Espindola2006-10-161-4/+4
| | | | llvm-svn: 30977
* implement LDRB, LDRSB, LDRH and LDRSHRafael Espindola2006-10-162-0/+20
| | | | llvm-svn: 30976
* implement smull and umullRafael Espindola2006-10-163-5/+24
| | | | llvm-svn: 30975
* expand ISD::BRCONDRafael Espindola2006-10-141-0/+2
| | | | llvm-svn: 30963
* fix some fp condition codesRafael Espindola2006-10-142-41/+28
| | | | | | use non trapping comparison instructions llvm-svn: 30962
* Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.Evan Cheng2006-10-131-5/+5
| | | | llvm-svn: 30945
* add FNEGS and FNEGDRafael Espindola2006-10-131-0/+8
| | | | llvm-svn: 30932
* add SBCS and SUBSRafael Espindola2006-10-131-0/+8
| | | | llvm-svn: 30930
* implement calls to functions that return longRafael Espindola2006-10-131-9/+16
| | | | llvm-svn: 30929
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