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* skip dbg_value instructionsJim Grosbach2010-06-291-0/+2
| | | | llvm-svn: 107154
* The t2MOVi16 and t2MOVTi16 instructions do not set CPSR. Trying to addBob Wilson2010-06-291-2/+2
| | | | | | | a CPSR operand to them causes an assertion failure, so apparently these instructions haven't been getting a lot of use. llvm-svn: 107147
* Add a VT argument to getMinimalPhysRegClass and replace the copy related usesRafael Espindola2010-06-291-0/+5
| | | | | | | | | of getPhysicalRegisterRegClass with it. If we want to make a copy (or estimate its cost), it is better to use the smallest class as more efficient operations might be possible. llvm-svn: 107140
* Remove pointless variable LastDef.Duncan Sands2010-06-291-2/+0
| | | | llvm-svn: 107135
* Remove unused variable Loc and pointless variables unified_syntaxDuncan Sands2010-06-291-15/+4
| | | | | | and thumb_mode. llvm-svn: 107133
* Remove an unused and a pointless variable.Duncan Sands2010-06-291-3/+0
| | | | llvm-svn: 107131
* Remove initialized but otherwise unused variables.Duncan Sands2010-06-291-1/+0
| | | | llvm-svn: 107127
* PR7503: uxtb16 is not available for ARMv7-M. Patch by Brian G. Lucas.Evan Cheng2010-06-291-2/+2
| | | | llvm-svn: 107122
* Change if-cvt options to something that actually as useable.Evan Cheng2010-06-291-4/+6
| | | | llvm-svn: 107121
* When no memoperands are present, assume unaligned, volatile.Jakob Stoklund Olesen2010-06-291-10/+13
| | | | llvm-svn: 107114
* Fix Thumb encoding of VMOV (scalar to ARM core register). The encoding isBob Wilson2010-06-291-1/+1
| | | | | | the same as ARM except that the condition code field is always set to ARMCC::AL. llvm-svn: 107107
* Make the ARMCodeEmitter identify Thumb functions via ARMFunctionInfo insteadBob Wilson2010-06-281-5/+7
| | | | | | of the Subtarget. llvm-svn: 107086
* tidy up style. no functional change.Jim Grosbach2010-06-281-2/+3
| | | | llvm-svn: 107073
* Refactor encoding function for NEON 1-register with modified immediate format.Bob Wilson2010-06-281-5/+1
| | | | llvm-svn: 107070
* Support Thumb mode encoding of NEON instructions.Bob Wilson2010-06-281-0/+15
| | | | llvm-svn: 107068
* minor housekeeping cleanup: 80-column, trailing whitespace, spelling, etc.. ↵Jim Grosbach2010-06-283-68/+68
| | | | | | No functional change. llvm-svn: 106988
* Followup to r106770: actually generate SXTB and SXTH for sign-extensions.Eli Friedman2010-06-261-5/+2
| | | | llvm-svn: 106940
* Add support for encoding NEON VMOV (from scalar to core register) instructions.Bob Wilson2010-06-261-0/+33
| | | | llvm-svn: 106938
* It's now possible to run code placement pass for ARM.Evan Cheng2010-06-261-4/+8
| | | | llvm-svn: 106935
* Renumber NEON instruction formats to be consecutive.Bob Wilson2010-06-263-26/+24
| | | | llvm-svn: 106927
* Rename ARM instruction formats NEONGetLnFrm, NEONSetLnFrm and NEONDupFrm toBob Wilson2010-06-253-27/+27
| | | | | | "N..." instead of "NEON..." for consistency with the other NEON format names. llvm-svn: 106921
* Remove unused NEONFrm and ThumbMiscFrm ARM instruction formats.Bob Wilson2010-06-253-22/+7
| | | | | | Renumber MiscFrm to 25. llvm-svn: 106916
* Thumb2ITBlockPass: Fix a possible dereference of an invalid iterator. This wasDaniel Dunbar2010-06-251-2/+2
| | | | | | | | | introduced in r106343, but only showed up recently (with a particular compiler & linker combination) because of the particular check, and because we have no builtin checking for dereferencing the end of an array, which is truly unfortunate. llvm-svn: 106908
* Change if-conversion block size limit checks to add some flexibility.Evan Cheng2010-06-255-17/+57
| | | | llvm-svn: 106901
* Add support for encoding 3-register NEON instructions, and fixBob Wilson2010-06-251-3/+36
| | | | | | emitNEON2RegInstruction's handling of 2-address operands. llvm-svn: 106900
* The hasMemory argument is irrelevant to how the argumentDale Johannesen2010-06-252-4/+1
| | | | | | | | | for an "i" constraint should get lowered; PR 6309. While this argument was passed around a lot, this is the only place it was used, so it goes away from a lot of other places. llvm-svn: 106893
* Add support for encoding 2-register NEON instructions.Bob Wilson2010-06-251-3/+25
| | | | llvm-svn: 106891
* Fix indentation.Bob Wilson2010-06-251-1/+1
| | | | llvm-svn: 106881
* IT instructions are considered to be scheduling hazards, but are scheduledJim Grosbach2010-06-251-1/+13
| | | | | | | | | | | | with the following instructions. This is done via trickery by considering the instruction preceding the IT to be the hazard. Care must be taken to ensure it's the first non-debug instruction, or the presence of debug info will affect codegen. Part of the continuing work for rdar://7797940, making ARM code-gen unaffected by the presence of debug information. llvm-svn: 106871
* Add missing ARM and Thumb data layout info for vector types.Bob Wilson2010-06-251-4/+8
| | | | | | Radar 8128745. llvm-svn: 106820
* Reduce indentation.Bob Wilson2010-06-251-8/+7
| | | | llvm-svn: 106819
* Oops. IT block formation pass needs to be run at any optimization level.Evan Cheng2010-06-241-4/+3
| | | | llvm-svn: 106775
* Always allow Thumb-2 SXTB, SXTH, UXTB, and UXTH. Fixes PR7324.Eli Friedman2010-06-241-11/+9
| | | | llvm-svn: 106770
* PR7458: Try commuting Thumb2 instruction operands to put them into 2-addressBob Wilson2010-06-241-3/+11
| | | | | | form so they can be narrowed to 16-bit instructions. llvm-svn: 106762
* We are missing opportunites to use ldm. Take code like this:Bill Wendling2010-06-232-0/+121
| | | | | | | | | | | | | | void t(int *cp0, int *cp1, int *dp, int fmd) { int c0, c1, d0, d1, d2, d3; c0 = (*cp0++ & 0xffff) | ((*cp1++ << 16) & 0xffff0000); c1 = (*cp0++ & 0xffff) | ((*cp1++ << 16) & 0xffff0000); /* ... */ } It code gens into something pretty bad. But with this change (analogous to the X86 back-end), it will use ldm and generate few instructions. llvm-svn: 106693
* Do not do tail calls to external symbols. If theDale Johannesen2010-06-231-12/+9
| | | | | | | | | | | branch turns out to be ARM-to-Thumb or vice versa the linker cannot resolve this. 8120438. If this optimization is going to be useful we probably need a compiler flag "assume callees are same architecture" or something like that. llvm-svn: 106662
* When using libcall expansions for the atomic intrinsics, the explicitJim Grosbach2010-06-231-0/+2
| | | | | | | MEMBARRIER fences aren't necessary for ARM. Tell the combiner to fold them away. llvm-svn: 106631
* Thumb1 functions using @llvm.returnaddress were not saving the incoming LR.Bob Wilson2010-06-221-3/+3
| | | | | | Radar 8031193. llvm-svn: 106582
* Use pre-increment instead of post-increment when the result is not used.Dan Gohman2010-06-223-19/+19
| | | | llvm-svn: 106542
* Tail merging pass shall not break up IT blocks. rdar://8115404Evan Cheng2010-06-223-13/+32
| | | | llvm-svn: 106517
* sign_extend_inreg needs to be expanded for pre-v6 Thumb as well as ARM.Bob Wilson2010-06-211-1/+1
| | | | | | Radar 8104310. llvm-svn: 106484
* LEApcrelJT shouldn't be marked as neverHasSideEffects, as we don't want itJim Grosbach2010-06-213-3/+3
| | | | | | being moved around away from the jump table it references. rdar://8104340 llvm-svn: 106483
* Fix PR7421: bug in kill transferring logic. It was ignoring loads / stores ↵Evan Cheng2010-06-211-39/+66
| | | | | | which have already been processed. llvm-svn: 106481
* Fix PR 7433. Silly typo in non-Darwin ARM tail callDale Johannesen2010-06-212-18/+8
| | | | | | handling, plus correct R9 handling in that mode. llvm-svn: 106434
* early exit for dbg_value instructionsJim Grosbach2010-06-211-0/+2
| | | | llvm-svn: 106430
* Fix a crash caused by dereference of MBB.end(). rdar://8110842Evan Cheng2010-06-201-6/+8
| | | | llvm-svn: 106399
* Remove a fixme comment that is no longer relevant.Bob Wilson2010-06-191-3/+0
| | | | llvm-svn: 106382
* Fix error message to match function name.Bob Wilson2010-06-191-1/+1
| | | | llvm-svn: 106381
* Ignore dbg_value's.Evan Cheng2010-06-191-1/+3
| | | | llvm-svn: 106373
* Disable sibcall optimization for Thumb1 for now since ↵Evan Cheng2010-06-191-8/+17
| | | | | | Thumb1RegisterInfo::emitEpilogue is not expecting them. llvm-svn: 106368
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