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* 80 column violationsJim Grosbach2009-11-241-8/+8
| | | | llvm-svn: 89718
* * Move stub allocation inside the JITEmitter, instead of exposing aJeffrey Yasskin2009-11-232-19/+30
| | | | | | | | | | | | | | way for each TargetJITInfo subclass to allocate its own stubs. This means stubs aren't as exactly-sized anymore, but it lets us get rid of TargetJITInfo::emitFunctionStubAtAddr(), which lets ARM and PPC support the eager JIT, fixing http://llvm.org/PR4816. * Rename the JITEmitter's stub creation functions to describe the kind of stub they create. So far, all of them create lazy-compilation stubs, but they sometimes get used when far-call stubs are needed. Fixing http://llvm.org/PR5201 will involve fixing this. llvm-svn: 89715
* Remove ISD::DEBUG_LOC and ISD::DBG_LABEL, which are no longer used.Dan Gohman2009-11-233-10/+0
| | | | | | | | Note that "hasDotLocAndDotFile"-style debug info was already broken; people wanting this functionality should implement it in the AsmPrinter/DwarfWriter code. llvm-svn: 89711
* Allow more than one stub to be being generated at the same time.Jeffrey Yasskin2009-11-231-6/+8
| | | | | | | | It's probably better in the long run to replace the indirect-GlobalVariable system. That'll be done after a subsequent patch. llvm-svn: 89708
* Massive refactoring of NEON instructions. Separate opcode from data size ↵Evan Cheng2009-11-232-858/+1012
| | | | | | | | specifier suffix, move \t up stream to instruction format, and fix more 80 column violations. This fixes the NEON asm printing so the "predicate" field is printed between the opcode and the data type suffix. llvm-svn: 89706
* move fconst[sd] to UAL. <rdar://7414913>Jim Grosbach2009-11-232-4/+4
| | | | llvm-svn: 89700
* Partially revert r84730 by removing N2VDup from ARMInstrFormats.td and modifyingJohnny Chen2009-11-232-37/+21
| | | | | | | VDUPLND and VDUPLNQ to derive from N2V instead of N2VDup. VDUPLND and VDUPLNQ now expect op19_18 and op17_16 as the first two args. llvm-svn: 89699
* fold immediate of a + Const into the user as a subtract if it can fit as a ↵Jim Grosbach2009-11-232-6/+37
| | | | | | negated two-part immediate. llvm-svn: 89694
* Revert r84572 by removing N3VImm from ARMInstrFormats.td now that we can specifyJohnny Chen2009-11-232-24/+10
| | | | | | {?,?,?,?} as op11_8 for VEXTd and VEXTq. llvm-svn: 89693
* Partially revert r89377 by removing NLdStLN class definition fromJohnny Chen2009-11-232-45/+34
| | | | | | | ARMInstrFormats.td and fixing VLD[234]LN* and VST[234]LN* to derive from NLdSt instead of NLdStLN. llvm-svn: 89684
* Make it clear that the index bit(s) of Vector Get Lane and Vector Set LaneJohnny Chen2009-11-231-8/+8
| | | | | | should be left unspecified now that Bob Wilson has fixed pr5470. llvm-svn: 89676
* Minor itinerary fixes for FP instructions.David Goodwin2009-11-231-13/+13
| | | | llvm-svn: 89672
* Move default FrameReg val to getFrameIndexReference(). Otherwise, debug info ↵Jim Grosbach2009-11-221-1/+2
| | | | | | can get bogus values. llvm-svn: 89618
* Generate more correct debug info for frame indices.Jim Grosbach2009-11-222-35/+53
| | | | llvm-svn: 89576
* Revert 89562. We're being sneakier than I was giving us credit for, and thisJim Grosbach2009-11-211-4/+1
| | | | | | isn't necessary. llvm-svn: 89568
* Darwin requires a frame pointer for all non-leaf functions to support correctJim Grosbach2009-11-211-1/+4
| | | | | | backtraces. llvm-svn: 89562
* Add predicate operand to NEON instructions. Fix lots (but not all) 80 col ↵Evan Cheng2009-11-216-297/+414
| | | | | | violations in ARMInstrNEON.td. llvm-svn: 89542
* We are not using DBG_STOPPOINT anymore.Devang Patel2009-11-211-1/+0
| | | | llvm-svn: 89536
* Remat VLDRD from constpool. Clean up some instruction property specifications.Evan Cheng2009-11-204-9/+10
| | | | llvm-svn: 89478
* The verify() call of CPEIsInRange() isn't right for the assertion check ofJim Grosbach2009-11-201-2/+5
| | | | | | | | | | constant pool ranges, as CPEIsInRange() makes conservative assumptions about the potential alignment changes from branch adjustments. The verification, on the other hand, runs after those branch adjustments are made, so the effects on alignment are known and already taken into account. The sanity check in verify should check the range directly instead. llvm-svn: 89473
* Remove verifySizes() since it's not adding much value.Jim Grosbach2009-11-201-36/+0
| | | | llvm-svn: 89443
* Also CSE non-pic load from constant pools.Evan Cheng2009-11-201-1/+4
| | | | llvm-svn: 89440
* Fix codegen of conditional move of immediates. We were not making use of the ↵Evan Cheng2009-11-201-65/+127
| | | | | | immediate forms of cmov instructions at all. llvm-svn: 89423
* Update comment to reflect instruction.Eric Christopher2009-11-201-1/+1
| | | | llvm-svn: 89414
* When placing constant islands and adjusting for alignment padding, inlineJim Grosbach2009-11-191-7/+66
| | | | | | | | | | | assembly can confuse things utterly, as it's assumed that instructions in inline assembly are 4 bytes wide. For Thumb mode, that's often not true, so the calculations for when alignment padding will be present get thrown off, ultimately leading to out of range constant pool entry references. Making more conservative assumptions that padding may be necessary when inline asm is present avoids this situation. llvm-svn: 89403
* Refactor cmov selection code out to a separate function. No functionality ↵Evan Cheng2009-11-191-116/+122
| | | | | | change. llvm-svn: 89396
* Added NLdStLN which is similar to NLdSt with the exception that op7_4 is notJohnny Chen2009-11-192-76/+169
| | | | | | | | fully specified at this level. Subclasses of NLdStLN can specify selective bit(s) for Inst{7-4}, as is done for VLD[234]LN* and VST[234]LN* inside ARMInstrNEON.td. llvm-svn: 89377
* fix typoJim Grosbach2009-11-191-1/+1
| | | | llvm-svn: 89369
* 80 col violation.Evan Cheng2009-11-191-1/+2
| | | | llvm-svn: 89337
* More consistent thumb1 asm printing.Evan Cheng2009-11-194-11/+27
| | | | llvm-svn: 89328
* Shrink ldr / str [sp, imm0-1024] to 16-bit instructions.Evan Cheng2009-11-191-8/+26
| | | | llvm-svn: 89326
* Eliminate more * 4 in Thumb1 asm printing for consistency sake.Evan Cheng2009-11-191-4/+4
| | | | llvm-svn: 89325
* Add ARMv6 itineraries.David Goodwin2009-11-183-13/+201
| | | | llvm-svn: 89218
* Fix a few places that were missed when we converted to unified syntax.Bob Wilson2009-11-181-2/+2
| | | | llvm-svn: 89214
* Add a target hook to allow changing the tail duplication limit based on theBob Wilson2009-11-184-0/+20
| | | | | | | | | contents of the block to be duplicated. Use this for ARM Cortex A8/9 to be more aggressive tail duplicating indirect branches, since it makes it much more likely that they will be predicted in the branch target buffer. Testcase coming soon. llvm-svn: 89187
* Enable arm jumpt table adjustment.Jim Grosbach2009-11-171-1/+1
| | | | llvm-svn: 89143
* Both Darwin as and GNU as violate ARM docs wrt printing of addrmode6Anton Korobeynikov2009-11-171-5/+2
| | | | | | alignment imm (in the same way). Fix asmprinting for non-darwin platforms. llvm-svn: 89137
* Set Inst{15-12} (Rd/Rt) to 0b1111 (PC) for BR_JTadd, BR_JTr, and BR_JTm toJohnny Chen2009-11-171-0/+3
| | | | | | distinguish between them and the more generic instructions (add, mov, and ldr). llvm-svn: 89108
* When moving a block for table jumps, make sure the prior block terminatorJim Grosbach2009-11-171-7/+9
| | | | | | | is analyzable so it can be updated. If it's not, be safe and don't move the block. llvm-svn: 89022
* Set Rm bits of BX_RET to 0b1110 (R14); and set condition code bits of BRIND toJohnny Chen2009-11-161-0/+2
| | | | | | | 0b1110 (ALways). This is so that the disassembler decoder can distinguish among BX_RET, BRIND, and BXr9. llvm-svn: 89000
* Make the pass class name more explicit.Jim Grosbach2009-11-161-4/+6
| | | | llvm-svn: 88964
* make pass name a bit more clearJim Grosbach2009-11-161-1/+1
| | | | llvm-svn: 88961
* Simplify thumb2 jump table adjustments. Remove unnecessary calculation andJim Grosbach2009-11-161-58/+14
| | | | | | usage of block sizes and offsets. llvm-svn: 88935
* clarify commentJim Grosbach2009-11-161-2/+2
| | | | llvm-svn: 88933
* back off for a bit. tracking down weirdnessJim Grosbach2009-11-161-1/+1
| | | | llvm-svn: 88919
* Analyze has to be before checking the condition, obviously. Properly ↵Jim Grosbach2009-11-161-6/+8
| | | | | | construct an iterator for prior. llvm-svn: 88917
* Detect need for autoalignment of the stack earlier to catch spills moreJim Grosbach2009-11-154-2/+51
| | | | | | | conservatively. eliminateFrameIndex() machinery adjust to handle addr mode 6 (vld1/vst1) used for spills. Fix tests to expect aligned Q-reg spilling llvm-svn: 88874
* set the def of the VLD1q64 properlyJim Grosbach2009-11-151-2/+1
| | | | llvm-svn: 88873
* cleanup.Jim Grosbach2009-11-141-3/+1
| | | | llvm-svn: 88812
* Cleanup flow, and only update the jump table we're analyzing when replacing ↵Jim Grosbach2009-11-141-9/+11
| | | | | | a destination MBB. llvm-svn: 88805
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