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* Remove redundant includes from lib/Target/ARM.Michael Zolotukhin2017-12-131-2/+0
| | | | llvm-svn: 320635
* [ARM] Tidy-up condition-code support functionsJaved Absar2017-08-271-0/+86
| | | | | | | | | Move condition code support functions to Utils and remove code duplication. Reviewed by: @fhahn, @asb Differential Revision: https://reviews.llvm.org/D37179 llvm-svn: 311860
* [ARM] Tidy up banked registers encodingJaved Absar2017-08-032-3/+19
| | | | | | | | | | Moves encoding (SYSm) information of banked registers to ARMSystemRegister.td, where it rightly belongs and forms a single point of reference in the code. Reviewed by: @fhahn, @rovka, @olista01 Differential Revision: https://reviews.llvm.org/D36219 llvm-svn: 309910
* [ARM] Unify handling of M-Class system registersJaved Absar2017-07-194-0/+135
This patch cleans up and fixes issues in the M-Class system register handling: 1. It defines the system registers and the encoding (SYSm values) in one place: a new ARMSystemRegister.td using SearchableTable, thereby removing the hand-coded values which existed in multiple places. 2. Some system registers e.g. BASEPRI_MAX_NS which do not exist were being allowed! Ref: ARMv6/7/8M architecture reference manual. Reviewed by: @t.p.northover, @olist01, @john.brawn Differential Revision: https://reviews.llvm.org/D35209 llvm-svn: 308456
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