| Commit message (Expand) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
| ... | ||||||
| * | Fix the previous accidental commit. Now shrinking common Thumb2 load / store ... | Evan Cheng | 2009-08-11 | 1 | -2/+4 | |
| * | Fix Thumb2 load / store addressing mode matching code. Do not use so_reg form to | Evan Cheng | 2009-08-11 | 1 | -2/+140 | |
| * | Watch out for empty BB. | Evan Cheng | 2009-08-10 | 1 | -1/+1 | |
| * | rev, rev16, and revsh do not set CPSR. | Evan Cheng | 2009-08-10 | 1 | -3/+3 | |
| * | Duh. Most 16-bit Thumb rr instructions are two-address. Fix table. | Evan Cheng | 2009-08-10 | 1 | -9/+15 | |
| * | CPSR can be livein; transfer predicate operands correctly; tMUL is two-address. | Evan Cheng | 2009-08-10 | 1 | -19/+57 | |
| * | Add support to reduce most of 32-bit Thumb2 arithmetic instructions. | Evan Cheng | 2009-08-10 | 1 | -69/+147 | |
| * | Add support to convert 32-bit instructions to 16-bit non-two-address ones. | Evan Cheng | 2009-08-09 | 1 | -35/+96 | |
| * | Add a skeleton Thumb2 instruction size reduction pass. | Evan Cheng | 2009-08-08 | 1 | -0/+213 | |
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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