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path: root/llvm/lib/Target/ARM/Thumb1RegisterInfo.h
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* - More refactoring. This gets rid of all of the getOpcode calls.Evan Cheng2009-07-281-2/+2
| | | | | | | | | | | - This change also makes it possible to switch between ARM / Thumb on a per-function basis. - Fixed thumb2 routine which expand reg + arbitrary immediate. It was using using ARM so_imm logic. - Use movw and movt to do reg + imm when profitable. - Other code clean ups and minor optimizations. llvm-svn: 77300
* Refactor. Get rid of a few more getOpcode() calls.Evan Cheng2009-07-261-0/+2
| | | | llvm-svn: 77164
* Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index ↵David Goodwin2009-07-241-0/+4
| | | | | | elimination more exactly for Thumb-2 to get better code gen. llvm-svn: 76919
* Let callers decide the sub-register index on the def operand of ↵Evan Cheng2009-07-161-1/+1
| | | | | | | | rematerialized instructions. Avoid remat'ing instructions whose def have sub-register indices for now. It's just really really hard to get all the cases right. llvm-svn: 75900
* Generalize opcode selection in ARMBaseRegisterInfo.David Goodwin2009-07-081-1/+1
| | | | llvm-svn: 75036
* Push methods into base class in preparation for sharing.David Goodwin2009-07-081-9/+8
| | | | llvm-svn: 75020
* Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into ↵David Goodwin2009-07-021-0/+60
Thumb1InstrInfo, Thumb2InstrInfo, Thumb1RegisterInfo and Thumb2RegisterInfo. Move methods from ARMInstrInfo to ARMBaseInstrInfo to prepare for sharing with Thumb2. llvm-svn: 74731
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