| Commit message (Collapse) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
| ... | ||||||
| * | Add codegen support for NEON vld2 intrinsics with <1 x i64> vectors. | Bob Wilson | 2009-10-07 | 1 | -0/+1 | |
| | | | | | llvm-svn: 83502 | |||||
| * | Add codegen support for NEON vst4 intrinsics with 128-bit vectors. | Bob Wilson | 2009-10-07 | 1 | -0/+18 | |
| | | | | | llvm-svn: 83486 | |||||
| * | Add codegen support for NEON vst3 intrinsics with 128-bit vectors. | Bob Wilson | 2009-10-07 | 1 | -0/+18 | |
| | | | | | llvm-svn: 83484 | |||||
| * | Add codegen support for NEON vst2 intrinsics with 128-bit vectors. | Bob Wilson | 2009-10-07 | 1 | -0/+7 | |
| | | | | | llvm-svn: 83482 | |||||
| * | Add codegen support for NEON vld4 intrinsics with 128-bit vectors. | Bob Wilson | 2009-10-07 | 1 | -0/+18 | |
| | | | | | llvm-svn: 83479 | |||||
| * | Add codegen support for NEON vld3 intrinsics with 128-bit vectors. | Bob Wilson | 2009-10-07 | 1 | -6/+29 | |
| | | | | | llvm-svn: 83471 | |||||
| * | Add codegen support for NEON vld2 operations on quad registers. | Bob Wilson | 2009-10-06 | 1 | -0/+7 | |
| | | | | | llvm-svn: 83422 | |||||
| * | Use copyRegToReg hook to copy registers. | Bob Wilson | 2009-10-06 | 1 | -6/+4 | |
| | | | | | llvm-svn: 83421 | |||||
| * | Add support for generating code for vst{234}lane intrinsics. | Bob Wilson | 2009-09-01 | 1 | -0/+9 | |
| | | | | | llvm-svn: 80707 | |||||
| * | Generate code for vld{234}_lane intrinsics. | Bob Wilson | 2009-09-01 | 1 | -0/+9 | |
| | | | | | llvm-svn: 80656 | |||||
| * | Generate Neon VTBL and VTBX instructions from the corresponding intrinsics. | Bob Wilson | 2009-08-12 | 1 | -0/+30 | |
| | | | | | llvm-svn: 78835 | |||||
| * | Implement Neon VST[234] operations. | Bob Wilson | 2009-08-06 | 1 | -0/+21 | |
| | | | | | llvm-svn: 78330 | |||||
| * | Neon does not actually have VLD{234}.64 instructions. | Bob Wilson | 2009-08-06 | 1 | -3/+0 | |
| | | | | | | | These operations will have to be synthesized from other instructions. llvm-svn: 78263 | |||||
| * | Add a new pre-allocation pass to assign adjacent registers for Neon instructions | Bob Wilson | 2009-08-05 | 1 | -0/+137 | |
| that have that constraint. This is currently just assigning a fixed set of registers, and it only handles VLDn for n=2,3,4 with DPR registers. I'm going to expand it to handle more operations next; we can make it smarter once everything is working correctly. llvm-svn: 78256 | ||||||
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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