| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Ensure conditional BL instructions for ARM are given the fixup ↵ | James Molloy | 2012-03-30 | 1 | -2/+15 |
| | | | | | | | | | fixup_arm_condbranch. Patch by Tim Northover! llvm-svn: 153737 | ||||
| * | ARM BL/BLX instruction fixups should use relocations. | Jim Grosbach | 2012-02-27 | 1 | -0/+6 |
| | | | | | | | | | | | | | | We on the linker to resolve calls to the appropriate BL/BLX instruction to make interworking function correctly. It uses the symbol in the relocation to do that, so we need to be careful about being too clever. To enable this for ARM mode, split the BL/BLX fixup kind off from the unconditional-branch fixups. rdar://10927209 llvm-svn: 151571 | ||||
| * | comment fix | Jia Liu | 2012-02-24 | 1 | -1/+1 |
| | | | | | llvm-svn: 151339 | ||||
| * | ARM assembly parsing and encoding support for LDRD(label). | Jim Grosbach | 2011-12-19 | 1 | -0/+3 |
| | | | | | | | rdar://9932658 llvm-svn: 146921 | ||||
| * | Sink ARM mc routines into MCTargetDesc. | Evan Cheng | 2011-07-23 | 1 | -0/+97 |
| llvm-svn: 135825 | |||||

