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* NEON VST3(single element from one lane) assembly parsing.Jim Grosbach2012-01-241-0/+126
| | | | llvm-svn: 148755
* NEON VST3(multiple 3-element structures) assembly parsing.Jim Grosbach2012-01-231-20/+147
| | | | llvm-svn: 148748
* NEON VLD3(multiple 3-element structures) assembly parsing.Jim Grosbach2012-01-231-6/+138
| | | | llvm-svn: 148745
* NEON VLD3 lane-indexed assembly parsing and encoding.Jim Grosbach2012-01-231-0/+164
| | | | llvm-svn: 148734
* Simplify some NEON assembly pseudo definitions.Jim Grosbach2012-01-231-263/+96
| | | | | | | Let the generic token alias definitions handle the data subtype suffices. We don't need explicit versions for each. llvm-svn: 148718
* Thumb2 'add rd, pc, imm' alternate form for 'adr' instruction.Jim Grosbach2012-01-211-1/+3
| | | | llvm-svn: 148601
* More dead code removal (using -Wunreachable-code)David Blaikie2012-01-201-6/+1
| | | | llvm-svn: 148578
* NEON use vmov.i32 to splat some f32 values into vectors.Jim Grosbach2012-01-201-36/+32
| | | | | | | | | | | For bit patterns that aren't representable using the 8-bit floating point representation for vmov.f32, but are representable via vmov.i32, treat the .f32 syntax as an alias. Most importantly, this covers the case 'vmov.f32 Vd, #0.0'. rdar://10616677 llvm-svn: 148556
* ARM assembly diagnostic caret in better position for FPImm.Jim Grosbach2012-01-191-3/+4
| | | | llvm-svn: 148459
* Thumb2 alternate syntax for LDR(literal) and friends.Jim Grosbach2012-01-181-0/+39
| | | | | | | | Explicit pc-relative syntax. For example, "ldrb r2, [pc, #-22]". rdar://10250964 llvm-svn: 148432
* Removing unused default switch cases in switches over enums that already ↵David Blaikie2012-01-161-6/+0
| | | | | | | | account for all enumeration values explicitly. (This time I believe I've checked all the -Wreturn-type warnings from GCC & added the couple of llvm_unreachables necessary to silence them. If I've missed any, I'll happily fix them as soon as I know about them) llvm-svn: 148262
* Fix malformed assert.Matt Beaumont-Gay2012-01-031-1/+1
| | | | | | | | If anybody has strong feelings about 'default: assert(0 && "blah")' vs 'default: llvm_unreachable("blah")', feel free to regularize the instances of each in this file. llvm-svn: 147459
* ARM VFP assembly parsing and encoding for VCVT(float <--> fixed point).Jim Grosbach2011-12-221-0/+26
| | | | | | rdar://10558523 llvm-svn: 147189
* Tidy up. Use predicate function a bit more liberally.Jim Grosbach2011-12-221-97/+52
| | | | llvm-svn: 147184
* ARM pre-UAL aliases. fcmp[sd].Jim Grosbach2011-12-221-1/+1
| | | | llvm-svn: 147158
* ARM assembler should accept shift-by-zero for any shifted-immediate operand.Jim Grosbach2011-12-221-0/+33
| | | | | | | | Just treat it as-if the shift wasn't there at all. 'as' compatibility. rdar://10604767 llvm-svn: 147153
* ARM assembly parser canonicallize on 'lsl' for shift-by-zero form.Jim Grosbach2011-12-221-0/+4
| | | | llvm-svn: 147152
* Tidy up. Trailing whitespace.Jim Grosbach2011-12-221-2/+2
| | | | llvm-svn: 147151
* Nuke invalid comment from copy/paste.Jim Grosbach2011-12-221-1/+0
| | | | llvm-svn: 147150
* ARM asm parser should be more lenient w/ .thumb_func directive.Jim Grosbach2011-12-211-8/+17
| | | | | | | | | | Rather than require the symbol to be explicitly an argument of the directive, allow it to look ahead and grab the symbol from the next non-whitespace line. rdar://10611140 llvm-svn: 147100
* Thumb2 assembly parsing of 'mov rd, rn, rrx'.Jim Grosbach2011-12-211-1/+3
| | | | | | | | Maps to the RRX instruction. Missed this case earlier. rdar://10615373 llvm-svn: 147096
* Thumb2 assembly parsing of 'mov(register shifted register)' aliases.Jim Grosbach2011-12-211-0/+36
| | | | | | | | These map to the ASR, LSR, LSL, ROR instruction definitions. rdar://10615373 llvm-svn: 147094
* ARM assembly parsing allows constant expressions for lane indices.Jim Grosbach2011-12-211-14/+25
| | | | llvm-svn: 147028
* ARM NEON VLD2 assembly parsing for structure to all lanes, non-writeback.Jim Grosbach2011-12-211-4/+20
| | | | llvm-svn: 147025
* ARM .req register name aliases are case insensitive, just like regnames.Jim Grosbach2011-12-201-3/+4
| | | | llvm-svn: 147009
* Move comment to appropriate place.Jim Grosbach2011-12-201-1/+1
| | | | llvm-svn: 147000
* ARM assembly parsing and encoding for VST2 single-element, double spaced.Jim Grosbach2011-12-201-37/+113
| | | | llvm-svn: 146990
* ARM assembly parsing and encoding for VLD2 single-element, double spaced.Jim Grosbach2011-12-201-42/+134
| | | | llvm-svn: 146983
* First steps in ARM AsmParser support for .eabi_attribute and .archJason W Kim2011-12-201-0/+18
| | | | | | | (Both used for Linux gnueabi) No behavioral change yet (no tests need so far) llvm-svn: 146977
* ARM assembly shifts by zero should be plain 'mov' instructions.Jim Grosbach2011-12-201-0/+17
| | | | | | | | | | "mov r1, r2, lsl #0" should assemble as "mov r1, r2" even though it's not strictly legal UAL syntax. It's a common extension and the friendly thing to do. rdar://10604663 llvm-svn: 146937
* ARM NEON assembly aliases for VMOV<-->VMVN for i32 immediates.Jim Grosbach2011-12-191-0/+30
| | | | | | | | e.g., "vmov.i32 d4, #-118" can be assembled as "vmvn.i32 d4, #117" rdar://10603913 llvm-svn: 146925
* ARM assembly parsing and encoding support for LDRD(label).Jim Grosbach2011-12-191-0/+29
| | | | | | rdar://9932658 llvm-svn: 146921
* ARM VFP pre-UAL mnemonic aliases for fmul[sd].Jim Grosbach2011-12-191-1/+3
| | | | llvm-svn: 146892
* ARM VFP pre-UAL mnemonic aliases for fcpy[sd] and fdiv[sd].Jim Grosbach2011-12-191-1/+1
| | | | llvm-svn: 146887
* ARM NEON relax parse time diagnostics for alignment specifiers.Jim Grosbach2011-12-191-2/+5
| | | | | | | There's more variation that we need to handle. Error checking will need to be on operand predicates. llvm-svn: 146884
* Silence warning.Jim Grosbach2011-12-151-1/+1
| | | | llvm-svn: 146686
* ARM NEON two-register double spaced register list parsing support.Jim Grosbach2011-12-151-14/+49
| | | | llvm-svn: 146685
* ARM NEON better assembly operand range checking for lane indices of VLD/VST.Jim Grosbach2011-12-141-0/+20
| | | | llvm-svn: 146608
* ARM NEON VLD2/VST2 lane indexed assembly parsing and encoding.Jim Grosbach2011-12-141-192/+349
| | | | llvm-svn: 146605
* ARM assembler support for the target-specific .req directive.Jim Grosbach2011-12-141-1/+67
| | | | | | rdar://10549683 llvm-svn: 146543
* Thumb2 assembler aliases for "mov(shifted register)"Jim Grosbach2011-12-131-1/+38
| | | | | | rdar://10549767 llvm-svn: 146520
* ARM LDM/STM system instruction variants.Jim Grosbach2011-12-131-0/+8
| | | | | | rdar://10550269 llvm-svn: 146519
* Thumb2 tweak for ccout handling in RSB parsing.Jim Grosbach2011-12-131-1/+4
| | | | llvm-svn: 146516
* ARM thumb2 parsing of "rsb rd, rn, #0".Jim Grosbach2011-12-131-2/+8
| | | | | | rdar://10549741 llvm-svn: 146515
* ARM add some more pre-UAL VFP mnemonics for convenience when porting old code.Jim Grosbach2011-12-131-0/+1
| | | | llvm-svn: 146508
* LLVMBuild: Remove trailing newline, which irked me.Daniel Dunbar2011-12-121-1/+0
| | | | llvm-svn: 146409
* ARM add some more pre-UAL VFP mnemonics for convenience when porting old code.Jim Grosbach2011-12-101-1/+1
| | | | llvm-svn: 146300
* ARM add some pre-UAL VFP mnemonics for convenience when porting old code.Jim Grosbach2011-12-091-0/+9
| | | | llvm-svn: 146296
* ARM allows '' syntax, not just '#imm' for assembly.Jim Grosbach2011-12-091-10/+21
| | | | | | | | Backwards compatibility with 'gas'. #imm is the preferered and documented syntax, but lots of existing code uses the '$' prefix, so we should support it if we can. llvm-svn: 146285
* ARM convenience aliases for VSQRT.Jim Grosbach2011-12-081-1/+1
| | | | llvm-svn: 146201
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