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path: root/llvm/lib/Target/ARM/ARMTargetMachine.cpp
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* Revert 78892 and 78895, these break generating working executables onDaniel Dunbar2009-08-131-1/+1
| | | | | | | | | | | | | | | | | | | | | x86_64-apple-darwin10. --- Reverse-merging r78895 into '.': U test/CodeGen/PowerPC/2008-12-12-EH.ll U lib/Target/DarwinTargetAsmInfo.cpp --- Reverse-merging r78892 into '.': U include/llvm/Target/DarwinTargetAsmInfo.h U lib/Target/X86/X86TargetAsmInfo.cpp U lib/Target/X86/X86TargetAsmInfo.h U lib/Target/ARM/ARMTargetAsmInfo.h U lib/Target/ARM/ARMTargetMachine.cpp U lib/Target/ARM/ARMTargetAsmInfo.cpp U lib/Target/PowerPC/PPCTargetAsmInfo.cpp U lib/Target/PowerPC/PPCTargetAsmInfo.h U lib/Target/PowerPC/PPCTargetMachine.cpp G lib/Target/DarwinTargetAsmInfo.cpp llvm-svn: 78919
* fix a minor fixme. When building with SL and later tools, the ".eh" symbolsChris Lattner2009-08-131-1/+1
| | | | | | don't need to be exported from the .o files. llvm-svn: 78892
* Change TargetAsmInfo to be constructed via TargetRegistry from a Target+TripleChris Lattner2009-08-121-10/+16
| | | | | | | | pair instead of from a virtual method on TargetMachine. This cuts the final ties of TargetAsmInfo to TargetMachine, meaning that MC can now use TargetAsmInfo. llvm-svn: 78802
* pass the TargetTriple down from each target ctor to theChris Lattner2009-08-111-1/+1
| | | | | | LLVMTargetMachine ctor. It is currently unused. llvm-svn: 78711
* Whitespace cleanup. Remove trailing whitespace.Jim Grosbach2009-08-111-1/+1
| | | | llvm-svn: 78666
* Adding a blank line back.Evan Cheng2009-08-111-0/+1
| | | | llvm-svn: 78654
* Enable Thumb2 instruction shrinking (32-bit to 16-bit) pass. Convert a bunch ↵Evan Cheng2009-08-101-5/+1
| | | | | | of thumb2 tests to FileCheck. llvm-svn: 78622
* Add a skeleton Thumb2 instruction size reduction pass.Evan Cheng2009-08-081-1/+6
| | | | llvm-svn: 78456
* Add a new pre-allocation pass to assign adjacent registers for Neon instructionsBob Wilson2009-08-051-0/+3
| | | | | | | | | that have that constraint. This is currently just assigning a fixed set of registers, and it only handles VLDn for n=2,3,4 with DPR registers. I'm going to expand it to handle more operations next; we can make it smarter once everything is working correctly. llvm-svn: 78256
* Oops. I didn't mean to commit this piece yet.Bob Wilson2009-08-051-2/+0
| | | | llvm-svn: 78146
* Change DAG nodes for Neon VLD2/3/4 operations to return multiple results.Bob Wilson2009-08-051-0/+2
| | | | | | | | | Get rid of yesterday's code to fix the register usage during isel. Select the new DAG nodes to machine instructions. The new pre-alloc pass to choose adjacent registers for these results is not done, so the results of this will generally not assemble yet. llvm-svn: 78136
* Enable load / store multiple pass for Thumb2. It's not using ldrd / strd yet.Evan Cheng2009-08-041-2/+3
| | | | llvm-svn: 78104
* Move most targets TargetMachine constructor to only taking a target triple.Daniel Dunbar2009-08-021-7/+6
| | | | | | - The C, C++, MSIL, and Mips backends still need the module. llvm-svn: 77927
* Normalize Subtarget constructors to take a target triple string instead ofDaniel Dunbar2009-08-021-1/+1
| | | | | | | | | | Module*. Also, dropped uses of TargetMachine where unnecessary. The only target which still takes a TargetMachine& is Mips, I would appreciate it if someone would normalize this to match other targets. llvm-svn: 77918
* ARM TAI no longer needs a TM, but createTargetAsmInfo() still does.Chris Lattner2009-08-021-2/+2
| | | | llvm-svn: 77878
* remove dead code.Chris Lattner2009-07-271-4/+3
| | | | llvm-svn: 77233
* Add new helpers for registering targets.Daniel Dunbar2009-07-251-9/+6
| | | | | | - Less boilerplate == good. llvm-svn: 77052
* Put Target definitions inside Target specific header, and llvm namespace.Daniel Dunbar2009-07-181-4/+3
| | | | llvm-svn: 76344
* Kill off <TARGET>MachineModule variables, and <TARGETASMPRINTER>ForceLinkDaniel Dunbar2009-07-161-7/+0
| | | | | | | variables. - Module initialization functions supplanted the need for these. llvm-svn: 75886
* Lift addAssemblyEmitter into LLVMTargetMachine.Daniel Dunbar2009-07-151-12/+0
| | | | | | - No functionality change. llvm-svn: 75859
* Lift DumpAsm / -print-emitted-asm functionality into LLVMTargetMachine.Daniel Dunbar2009-07-151-24/+0
| | | | | | - No intended functionality change. llvm-svn: 75848
* Remove old style hacks to register AsmPrinter into TargetMachine.Daniel Dunbar2009-07-151-8/+4
| | | | | | - No intended functionality change. llvm-svn: 75843
* Reapply TargetRegistry refactoring commits.Daniel Dunbar2009-07-151-63/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | --- Reverse-merging r75799 into '.': U test/Analysis/PointerTracking U include/llvm/Target/TargetMachineRegistry.h U include/llvm/Target/TargetMachine.h U include/llvm/Target/TargetRegistry.h U include/llvm/Target/TargetSelect.h U tools/lto/LTOCodeGenerator.cpp U tools/lto/LTOModule.cpp U tools/llc/llc.cpp U lib/Target/PowerPC/PPCTargetMachine.h U lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp U lib/Target/PowerPC/PPCTargetMachine.cpp U lib/Target/PowerPC/PPC.h U lib/Target/ARM/ARMTargetMachine.cpp U lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp U lib/Target/ARM/ARMTargetMachine.h U lib/Target/ARM/ARM.h U lib/Target/XCore/XCoreTargetMachine.cpp U lib/Target/XCore/XCoreTargetMachine.h U lib/Target/PIC16/PIC16TargetMachine.cpp U lib/Target/PIC16/PIC16TargetMachine.h U lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp U lib/Target/Alpha/AlphaTargetMachine.cpp U lib/Target/Alpha/AlphaTargetMachine.h U lib/Target/X86/X86TargetMachine.h U lib/Target/X86/X86.h U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h U lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h U lib/Target/X86/X86TargetMachine.cpp U lib/Target/MSP430/MSP430TargetMachine.cpp U lib/Target/MSP430/MSP430TargetMachine.h U lib/Target/CppBackend/CPPTargetMachine.h U lib/Target/CppBackend/CPPBackend.cpp U lib/Target/CBackend/CTargetMachine.h U lib/Target/CBackend/CBackend.cpp U lib/Target/TargetMachine.cpp U lib/Target/IA64/IA64TargetMachine.cpp U lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp U lib/Target/IA64/IA64TargetMachine.h U lib/Target/IA64/IA64.h U lib/Target/MSIL/MSILWriter.cpp U lib/Target/CellSPU/SPUTargetMachine.h U lib/Target/CellSPU/SPU.h U lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp U lib/Target/CellSPU/SPUTargetMachine.cpp U lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp U lib/Target/Mips/MipsTargetMachine.cpp U lib/Target/Mips/MipsTargetMachine.h U lib/Target/Mips/Mips.h U lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp U lib/Target/Sparc/SparcTargetMachine.cpp U lib/Target/Sparc/SparcTargetMachine.h U lib/ExecutionEngine/JIT/TargetSelect.cpp U lib/Support/TargetRegistry.cpp llvm-svn: 75820
* Revert 75762, 75763, 75766..75769, 75772..75775, 75778, 75780, 75782 to ↵Stuart Hastings2009-07-151-15/+63
| | | | | | | | repair broken LLVM-GCC build. Will revert 75770 in the llvm-gcc trunk. llvm-svn: 75799
* Replace large swaths of copy-n-paste code with obvious helper function...Daniel Dunbar2009-07-151-30/+12
| | | | | | | | | | | | | | | | | | | | | | | - Which was already present in the module! - I skipped this xform for Alpha, since it runs an extra pass during assembly emission, but not when emitting assembly via the DumpAsm flag. - No functionality change. -- ddunbar@giles:llvm$ svn diff | grep '^- ' | sort | uniq -c 18 - PM.add(AsmPrinterCtor(ferrs(), *this, true)); 18 - assert(AsmPrinterCtor && "AsmPrinter was not linked in"); 18 - if (AsmPrinterCtor) 18 - if (DumpAsm) { 18 - } ddunbar@giles:llvm$ svn diff | grep '^+ ' | sort | uniq -c 18 + addAssemblyEmitter(PM, OptLevel, true, ferrs()); 18 + if (DumpAsm) -- llvm-svn: 75782
* Kill off old (TargetMachine level, not Target level) match quality functions.Daniel Dunbar2009-07-151-55/+0
| | | | llvm-svn: 75780
* Provide TargetMachine implementations with reference to Target they were createdDaniel Dunbar2009-07-151-6/+10
| | | | | | | | from. - This commit is almost entirely propogating the reference through the TargetMachine subclasses' constructor calls. llvm-svn: 75778
* Register Target's TargetMachine and AsmPrinter in the new registry.Daniel Dunbar2009-07-151-2/+5
| | | | | | | - This abuses TargetMachineRegistry's constructor for now, this will get cleaned up in time. llvm-svn: 75762
* Have asm printers use formatted_raw_ostream directly to avoid aDavid Greene2009-07-141-8/+8
| | | | | | dynamic_cast<>. llvm-svn: 75670
* Add a thumb2 pass to insert IT blocks.Evan Cheng2009-07-101-0/+3
| | | | llvm-svn: 75218
* Add the Object Code Emitter class. Original patch by Aaron Gray, I did someBruno Cardoso Lopes2009-07-061-0/+33
| | | | | | cleanup, removed some #includes and moved Object Code Emitter out-of-line. llvm-svn: 74813
* Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into ↵David Goodwin2009-07-021-1/+6
| | | | | | Thumb1InstrInfo, Thumb2InstrInfo, Thumb1RegisterInfo and Thumb2RegisterInfo. Move methods from ARMInstrInfo to ARMBaseInstrInfo to prepare for sharing with Thumb2. llvm-svn: 74731
* Remove unused AsmPrinter OptLevel argument, and propogate.Daniel Dunbar2009-07-011-5/+5
| | | | | | | - This more or less amounts to a revert of r65379. I'm curious to know what happened that caused this variable to become unused. llvm-svn: 74579
* Split thumb-related stuff into separate classes.Anton Korobeynikov2009-06-261-47/+49
| | | | | | Step 1: ARMInstructionInfo => {ARM,Thumb}InstructionInfo llvm-svn: 74329
* Provide InitializeAllTargets and InitializeNativeTarget functions in theBob Wilson2009-06-231-4/+2
| | | | | | | | C bindings. Change all the backend "Initialize" functions to have C linkage. Change the "llvm/Config/Targets.def" header to use C-style comments to avoid compile warnings. llvm-svn: 74026
* Enable arm pre-allocation load / store multiple optimization pass.Evan Cheng2009-06-191-5/+0
| | | | llvm-svn: 73791
* Latency information for ARM v6. It's rough and not yet hooked up. Right now ↵Evan Cheng2009-06-191-1/+2
| | | | | | we are only using branch latency to determine if-conversion limits. llvm-svn: 73747
* Introduce new headers whose inclusion forces linking andDouglas Gregor2009-06-161-0/+5
| | | | | | | | | initialization of all targets (InitializeAllTargets.h) or assembler printers (InitializeAllAsmPrinters.h). This is a step toward the elimination of relinked object files, so that we can build normal archives. llvm-svn: 73543
* Add a ARM specific pre-allocation pass that re-schedule loads / stores fromEvan Cheng2009-06-131-0/+13
| | | | | | | | | | | consecutive addresses togther. This makes it easier for the post-allocation pass to form ldm / stm. This is step 1. We are still missing a lot of ldm / stm opportunities because of register allocation are not done in the desired order. More enhancements coming. llvm-svn: 73291
* First patch in the direction of splitting MachineCodeEmitter in two subclasses:Bruno Cardoso Lopes2009-05-301-0/+36
| | | | | | JITCodeEmitter and ObjectCodeEmitter. No functional changes yet. Patch by Aaron Gray llvm-svn: 72631
* Instead of passing in an unsigned value for the optimization level, use an enum,Bill Wendling2009-04-291-8/+13
| | | | | | | which better identifies what the optimization is doing. And is more flexible for future uses. llvm-svn: 70440
* Second attempt:Bill Wendling2009-04-291-12/+16
| | | | | | | | | | | | Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to use the old behavior, the flag is -O0. This change allows for finer-grained control over which optimizations are run at different -O levels. Most of this work was pretty mechanical. The majority of the fixes came from verifying that a "fast" variable wasn't used anymore. The JIT still uses a "Fast" flag. I'll change the JIT with a follow-up patch. llvm-svn: 70343
* r70270 isn't ready yet. Back this out. Sorry for the noise.Bill Wendling2009-04-281-16/+12
| | | | llvm-svn: 70275
* Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want toBill Wendling2009-04-281-12/+16
| | | | | | | | | | | use the old behavior, the flag is -O0. This change allows for finer-grained control over which optimizations are run at different -O levels. Most of this work was pretty mechanical. The majority of the fixes came from verifying that a "fast" variable wasn't used anymore. The JIT still uses a "Fast" flag. I'm not 100% sure if it's necessary to change it there... llvm-svn: 70270
* CodeGen still defaults to non-verbose asm, but llc now overrides it and ↵Evan Cheng2009-03-251-4/+4
| | | | | | default to verbose. llvm-svn: 67668
* ARM target now also recognize triplets like thumbv6-apple-darwin and set ↵Evan Cheng2009-03-091-2/+5
| | | | | | thumb mode and arch subversion. Eventually thumb triplets will go way and replaced with function notes. llvm-svn: 66435
* Overhaul my earlier submission due to feedback. It's a large patch, but most ofBill Wendling2009-02-241-3/+3
| | | | | | | | | | | | them are generic changes. - Use the "fast" flag that's already being passed into the asm printers instead of shoving it into the DwarfWriter. - Instead of calling "MI->getParent()->getParent()" for every MI, set the machine function when calling "runOnMachineFunction" in the asm printers. llvm-svn: 65379
* Adds extern "C" ints to the .cpp files that use RegisterTarget, asOscar Fuentes2008-11-151-0/+7
| | | | | | | | | | | well as 2 files that use "Registrator"s. These are to be used by the MSVC builds, as the Win32 linker does not include libs that are otherwise unreferenced, even if global constructors in the lib have side-effects. Patch by Scott Graham! llvm-svn: 59378
* Tell ARMJITInfo if codegen relocation is PIC. It changes how function stubs ↵Evan Cheng2008-11-081-1/+1
| | | | | | are generated. llvm-svn: 58896
* ARM JIT should observe -relocation-model command line option.Evan Cheng2008-10-301-2/+5
| | | | llvm-svn: 58433
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