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path: root/llvm/lib/Target/ARM/ARMMCInstLower.cpp
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* fix indentationEtienne Bergeron2016-06-211-1/+1
| | | | llvm-svn: 273274
* Removing an unused switch statement that has only a default label. This ↵Aaron Ballman2016-06-201-22/+16
| | | | | | happens to also eliminate an instance of switchception. NFC intended. llvm-svn: 273161
* Don't print (PLT) on arm.Rafael Espindola2016-06-161-5/+0
| | | | | | | | | The R_ARM_PLT32 relocation is deprecated and is not produced by MC. This means that the code being deleted is dead from the .o point of view and was making the .s more confusing. llvm-svn: 272909
* MC: Clean up MCExpr naming. NFC.Jim Grosbach2015-05-301-9/+9
| | | | llvm-svn: 238634
* MC: Modernize MCOperand API naming. NFC.Jim Grosbach2015-05-131-5/+5
| | | | | | MCOperand::Create*() methods renamed to MCOperand::create*(). llvm-svn: 237275
* Add support for ARM modified-immediate assembly syntax.Asiri Rathnayake2014-12-021-1/+35
| | | | | | | | | | | | | | | | | | | | Certain ARM instructions accept 32-bit immediate operands encoded as a 8-bit integer value (0-255) and a 4-bit rotation (0-30, even). Current ARM assembly syntax support in LLVM allows the decoded (32-bit) immediate to be specified as a single immediate operand for such instructions: mov r0, #4278190080 The ARMARM defines an extended assembly syntax allowing the encoding to be made more explicit, as in: mov r0, #255, #8 ; (same 32-bit value as above) The behaviour of the two instructions can be different w.r.t flags, which is documented under "Modified immediate constants" in ARMARM. This patch enables support for this extended syntax at the MC layer. llvm-svn: 223113
* ARM: use symbolic name for constantSaleem Abdulrasool2014-06-301-1/+1
| | | | | | | This just changes the constant value to the symbolic name corresponding to it. NFC. llvm-svn: 212011
* Prune includes in ARM target.Craig Topper2014-03-221-0/+1
| | | | llvm-svn: 204548
* Move the llvm mangler to lib/IR.Rafael Espindola2014-01-071-1/+1
| | | | | | This makes it available to tools that don't link with target (like llvm-ar). llvm-svn: 198708
* Add support for parsing ARM symbol variants on ELF targetsDavid Peixotto2013-12-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARM symbol variants are written with parens instead of @ like this: .word __GLOBAL_I_a(target1) This commit adds support for parsing these symbol variants in expressions. We introduce a new flag to MCAsmInfo that indicates the parser should use parens to parse the symbol variant. The expression parser is modified to look for symbol variants using parens instead of @ when the corresponding MCAsmInfo flag is true. The MCAsmInfo parens flag is enabled only for ARM on ELF. By adding this flag to MCAsmInfo, we are able to get rid of redundant ARM-specific symbol variants and use the generic variants instead (e.g. VK_GOT instead of VK_ARM_GOT). We use the new UseParensForSymbolVariant attribute in MCAsmInfo to correctly print the symbol variants for arm. To achive this we need to keep a handle to the MCAsmInfo in the MCSymbolRefExpr class that we can check when printing the symbol variant. Updated Tests: Changed case of symbol variant to match the generic kind. test/CodeGen/ARM/tls-models.ll test/CodeGen/ARM/tls1.ll test/CodeGen/ARM/tls2.ll test/CodeGen/Thumb2/tls1.ll test/CodeGen/Thumb2/tls2.ll PR18080 llvm-svn: 196424
* ARM: remove special cases for Darwin dynamic-no-pic mode.Tim Northover2013-11-251-4/+7
| | | | | | | | | These are handled almost identically to static mode (and ELF's global address materialisation), except that a symbol may have "$non_lazy_ptr" appended. This can be handled by passing appropriate flags along with the instruction instead of using entirely separate pseudo-instructions. llvm-svn: 195655
* Add a helper getSymbol to AsmPrinter.Rafael Espindola2013-10-291-1/+1
| | | | llvm-svn: 193627
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-021-1/+1
| | | | | | | | | | | | | | | | | | | | | into their new header subdirectory: include/llvm/IR. This matches the directory structure of lib, and begins to correct a long standing point of file layout clutter in LLVM. There are still more header files to move here, but I wanted to handle them in separate commits to make tracking what files make sense at each layer easier. The only really questionable files here are the target intrinsic tablegen files. But that's a battle I'd rather not fight today. I've updated both CMake and Makefile build systems (I think, and my tests think, but I may have missed something). I've also re-sorted the includes throughout the project. I'll be committing updates to Clang, DragonEgg, and Polly momentarily. llvm-svn: 171366
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-1/+1
| | | | | | | | | | | | | | | | | Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] llvm-svn: 169131
* Convert assert(0) to llvm_unreachableCraig Topper2012-02-071-5/+2
| | | | llvm-svn: 149961
* Ignore register mask operands when lowering instructions to MC.Jakob Stoklund Olesen2012-01-181-0/+3
| | | | | | | This is similar to implicit register operands. MC doesn't understand register liveness and call clobbers. llvm-svn: 148437
* Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate ↵Evan Cheng2011-07-201-1/+1
| | | | | | ARM MC code from target. llvm-svn: 135636
* Use TableGen'erated pseudo lowering for ARM.Jim Grosbach2011-07-081-54/+64
| | | | | | | | | Hook up the TableGen lowering for simple pseudo instructions for ARM and use it for a subset of the many pseudos the backend has as proof of concept. More conversions to come. llvm-svn: 134705
* Add needed braces.Bill Wendling2011-01-261-1/+2
| | | | llvm-svn: 124273
* Model :upper16: and :lower16: as ARM specific MCTargetExpr. This is a stepEvan Cheng2011-01-131-8/+18
| | | | | | | | in the right direction. It eliminated some hacks and will unblock codegen work. But it's far from being done. It doesn't reject illegal expressions, e.g. (FOO - :lower16:BAR). It also doesn't work in Thumb2 mode at all. llvm-svn: 123369
* Move the ARMAsmPrinter class defintiion into a header file.Jim Grosbach2010-12-011-3/+3
| | | | llvm-svn: 120551
* Trailing whitespace.Jim Grosbach2010-11-301-3/+3
| | | | llvm-svn: 120497
* trim #includes.Chris Lattner2010-11-141-5/+1
| | | | llvm-svn: 119075
* rename LowerToMCInst -> LowerARMMachineInstrToMCInst.Chris Lattner2010-11-141-1/+2
| | | | llvm-svn: 119071
* even more simplifications. ARM MCInstLowering is now justChris Lattner2010-11-141-12/+11
| | | | | | | a single function instead of a class. It doesn't need the complexity that X86 does. llvm-svn: 119070
* more shrinkificationChris Lattner2010-11-141-5/+1
| | | | llvm-svn: 119068
* more simplifications.Chris Lattner2010-11-141-84/+17
| | | | llvm-svn: 119067
* simplify and tidy upChris Lattner2010-11-141-27/+10
| | | | llvm-svn: 119066
* Add support for ELF PLT references for ARM MC asm printing. Adding aJim Grosbach2010-09-221-9/+22
| | | | | | | | new VariantKind to the MCSymbolExpr seems like overkill, but I'm not sure there's a more straightforward way to get the printing difference captured. (i.e., x86 uses @PLT, ARM uses (PLT)). llvm-svn: 114613
* Enable a few additional asserts in MC instruction lowering.Jim Grosbach2010-09-221-9/+6
| | | | llvm-svn: 114601
* Remove a few commented out bitsJim Grosbach2010-09-221-14/+0
| | | | llvm-svn: 114576
* handle the upper16/lower16 target operand flags on symbol references for MCJim Grosbach2010-09-171-5/+35
| | | | | | instruction lowering. llvm-svn: 114191
* Make sure to promote single precision floats to double before extracting themJim Grosbach2010-09-161-2/+4
| | | | | | from the APFloat. llvm-svn: 114096
* store MC FP immediates as a double instead of as an APFloat, thus avoiding anJim Grosbach2010-09-161-1/+2
| | | | | | unnecessary dtor for MCOperand. llvm-svn: 114064
* Add support for floating point immediates to MC instruction printing. ARMJim Grosbach2010-09-151-0/+4
| | | | | | | | | | | VFP instructions use it for loading some constants, so implement that handling. Not thrilled with adding a member to MCOperand, but not sure there's much of a better option that's not pretty fragile (like putting a double in the union instead and just assuming that's good enough). Suggestions welcome... llvm-svn: 113996
* Don't ignore the CPSR implicit def when lowering a MachineInstruction to an ↵Jim Grosbach2010-09-141-2/+3
| | | | | | MCInst. llvm-svn: 113847
* trailing whitespaceJim Grosbach2010-09-131-14/+14
| | | | llvm-svn: 113768
* sink the arm implementations of ASmPrinter and MCInstLowerChris Lattner2010-07-191-0/+162
out of the AsmPrinter directory into libarm. Now the ARM InstPrinters depend jsut on the MC stuff, not on vmcore or codegen. llvm-svn: 108783
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