| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Add MOVi ARM encoding. | Jim Grosbach | 2010-10-12 | 1 | -0/+7 |
| | | | | | llvm-svn: 116321 | ||||
| * | Nuke unused wrapper function. | Jim Grosbach | 2010-10-12 | 1 | -3/+0 |
| | | | | | llvm-svn: 116318 | ||||
| * | Add encoding information for the remainder of the generic arithmetic | Jim Grosbach | 2010-10-12 | 1 | -19/+36 |
| | | | | | | | ARM instructions. llvm-svn: 116313 | ||||
| * | MC machine encoding for simple aritmetic instructions that use a shifted | Jim Grosbach | 2010-10-11 | 1 | -1/+21 |
| | | | | | | | register operand. llvm-svn: 116259 | ||||
| * | Implement a few more binary encoding bits. Still very early stage proof-of- | Jim Grosbach | 2010-10-08 | 1 | -0/+19 |
| | | | | | | | | | | | concept level stuff at this point, but it is generally working for those instructions that know how to map the operands. This patch fills in the register operands for add/sub/or/etc instructions and adds the conditional execution predicate encoding. llvm-svn: 116112 | ||||
| * | Reapply 116059, this time without the fatfingered pasto at the top. | Jim Grosbach | 2010-10-08 | 1 | -9/+5 |
| | | | | | | | ''const'ify getMachineOpValue() and associated helpers.' llvm-svn: 116067 | ||||
| * | Reverting 116059. Bots are unhappy with it. | Jim Grosbach | 2010-10-08 | 1 | -5/+9 |
| | | | | | llvm-svn: 116064 | ||||
| * | 'const'ify getMachineOpValue() and associated helpers. | Jim Grosbach | 2010-10-08 | 1 | -9/+5 |
| | | | | | llvm-svn: 116059 | ||||
| * | Enable binary encoding of some simple instructions. | Jim Grosbach | 2010-10-08 | 1 | -0/+8 |
| | | | | | llvm-svn: 116022 | ||||
| * | Make <target>CodeEmitter::getBinaryCodeForInstr() a const method. | Jim Grosbach | 2010-10-08 | 1 | -1/+1 |
| | | | | | llvm-svn: 116018 | ||||
| * | Trivial MC code emitter shell. No instruction forms actually handled yet. | Jim Grosbach | 2010-10-07 | 1 | -3/+19 |
| | | | | | llvm-svn: 115993 | ||||
| * | Include the auto-generated bits for machine encoding. | Jim Grosbach | 2010-10-07 | 1 | -0/+20 |
| | | | | | llvm-svn: 115987 | ||||
| * | ARM instruction don't have instruction prefixes, so remove the helper functions | Jim Grosbach | 2010-10-07 | 1 | -16/+1 |
| | | | | | | | for them from the MCCodeEmitter. llvm-svn: 115975 | ||||
| * | Fix build. | Michael J. Spencer | 2010-09-18 | 1 | -0/+1 |
| | | | | | llvm-svn: 114292 | ||||
| * | Add skeleton infrastructure for the ARMMCCodeEmitter class. Patch by Jason Kim! | Jim Grosbach | 2010-09-17 | 1 | -0/+114 |
| llvm-svn: 114195 | |||||
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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