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path: root/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
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* Remove redundant Thumb2 ADD/SUB SP instruction definitions.Jim Grosbach2011-06-291-10/+2
* - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng2011-06-281-11/+11
* More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo.Evan Cheng2011-06-271-1/+1
* Clean up comment a bit.Eric Christopher2011-05-251-2/+2
* Fix more of PR8825. Now all of CodeGen/ARM passes with VerifyCoalescing turne...Cameron Zwarich2011-05-181-4/+7
* use the MachineInstrBuilder operator-> to simplify some code.Chris Lattner2011-04-291-1/+1
* Fix a ton of comment typos found by codespell. Patch byChris Lattner2011-04-151-4/+4
* Clean up some code for clarity.Bob Wilson2011-04-051-5/+24
* Check early if this is an unsupported opcode, so that we can avoid needlessly...Owen Anderson2011-03-291-0/+4
* Add safety check that didn't show up in testing.Owen Anderson2011-03-291-0/+1
* Get rid of the non-writeback versions VLDMDB and VSTMDB, which don't actually...Owen Anderson2011-03-291-17/+5
* Do not form thumb2 ldrd / strd if the offset is by multiple of 4. rdar://9133587Evan Cheng2011-03-151-9/+3
* Teach ARMLoadStoreOptimizer to remove kill flags from merged instructions as ...Jakob Stoklund Olesen2011-02-151-21/+15
* Move code for OffsetCompare struct closer to where it is used.Bob Wilson2011-02-071-11/+11
* Fix a few more places that should use MBB::getLastNonDebugInstr().Jakob Stoklund Olesen2011-01-131-1/+1
* Do not model all INLINEASM instructions as having unmodelled side effects.Evan Cheng2011-01-071-1/+1
* PR8921: LDM/POP do not support interworking prior to v5t.Bob Wilson2011-01-061-1/+2
* Missed the _RET versions of LDMIA.Bill Wendling2010-11-181-0/+2
* Add missing opcodes now that this function's used in more than one place.Bill Wendling2010-11-171-0/+20
* Revert r119109 for now. It's breaking 176.gcc.Evan Cheng2010-11-171-17/+0
* The machine instruction no longer encodes the submode as a separate operand. WeBill Wendling2010-11-171-2/+8
* Encode the multi-load/store instructions with their respective modes ('ia',Bill Wendling2010-11-161-67/+236
* Make sure ARM multi load / store pass copies memoperands when forming ldrd / ...Evan Cheng2010-11-151-0/+17
* Refactor ARM STR/STRB instruction patterns into STR{B}i12 and STR{B}rs, likeJim Grosbach2010-10-271-69/+34
* One more spot where the new arm mode LDR instruction representationJim Grosbach2010-10-271-3/+3
* First part of refactoring ARM addrmode2 (load/store) instructions to be moreJim Grosbach2010-10-261-18/+27
* Grammar.Jim Grosbach2010-10-261-1/+1
* Transfer implicit ops when forming load multiple and return instructions.Evan Cheng2010-10-221-0/+1
* Increase ARM APCS preferred alignment for i64 and f64 from 32 bits to 64 bits.Bob Wilson2010-09-291-1/+1
* move getRegisterNumbering() to out of ARMBaseRegisterInfo into the helperJim Grosbach2010-09-151-2/+2
* Calculate the number of VLDM/VSTM registers by subtracting the number ofBob Wilson2010-09-101-2/+2
* Fix merging base-updates for VLDM/VSTM: Before I switched these instructionsBob Wilson2010-09-101-1/+2
* Remember to clear the shadow kill flag at the same time as clearing the realJakob Stoklund Olesen2010-08-301-0/+1
* When merging Thumb2 loads/stores, do not give up when the offset is one ofBob Wilson2010-08-271-10/+7
* Change ARM VFP VLDM/VSTM instructions to use addressing mode #4, just likeBob Wilson2010-08-271-77/+41
* Unsigned value cannot be < 0.Bob Wilson2010-08-271-2/+2
* Reapply r110396, with fixes to appease the Linux buildbot gods.Owen Anderson2010-08-061-2/+2
* Revert r110396 to fix buildbots.Owen Anderson2010-08-061-2/+2
* Don't use PassInfo* as a type identifier for passes. Instead, use the addres...Owen Anderson2010-08-051-2/+2
* When no memoperands are present, assume unaligned, volatile.Jakob Stoklund Olesen2010-06-291-10/+13
* Use pre-increment instead of post-increment when the result is not used.Dan Gohman2010-06-221-12/+12
* Fix PR7421: bug in kill transferring logic. It was ignoring loads / stores wh...Evan Cheng2010-06-211-39/+66
* Make sure to skip dbg_value instructions when finding an insertion point forJim Grosbach2010-06-151-1/+2
* be slightly more subtle about skipping dbg_value instructions; otherwise, if aJim Grosbach2010-06-091-5/+6
* fix copy/paste/modify think-oJim Grosbach2010-06-081-1/+1
* Another fix to prevent debug info from affecting codegen. rdar://7797940Jim Grosbach2010-06-041-0/+4
* more dbg_value adjustments so debug info doesn't affect codegenJim Grosbach2010-06-041-2/+4
* fix typoJim Grosbach2010-06-041-1/+1
* Teach the ARM load-store optimizer to deal with dbg_value instructions.Jim Grosbach2010-06-031-4/+16
* Clean up 80 column violations. No functional change.Jim Grosbach2010-06-021-2/+2
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