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path: root/llvm/lib/Target/ARM/ARMISelLowering.cpp
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* [NEON] Support VLD1xN intrinsics in AArch32 mode (LLVM part)Ivan A. Kosarev2018-06-021-0/+18
* Revert r333819 "[NEON] Support VLD1xN intrinsics in AArch32 mode (Clang part)"Ivan A. Kosarev2018-06-021-18/+0
* [NEON] Support VLD1xN intrinsics in AArch32 mode (Clang part)Ivan A. Kosarev2018-06-021-0/+18
* [ARM] Remove code handling ADDC/ADDE/SUBC/SUBEAmaury Sechet2018-05-301-30/+0
* [ARM] Enable SETCCCARRY lowering for Thumb1.Eli Friedman2018-05-291-3/+1
* ARM: be conservative when asked load/store alignment of weird type.Tim Northover2018-05-211-0/+4
* Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen2018-05-141-9/+8
* [ARM] Add support for SETCCCARRY instead of SETCCEAmaury Sechet2018-05-091-5/+12
* [ARM] Select result 1 from ConvertBooleanCarryToCarryFlag's result automatica...Amaury Sechet2018-05-071-4/+6
* ARM: don't try to over-align large vectors as arguments.Tim Northover2018-05-031-0/+12
* Remove \brief commands from doxygen comments.Adrian Prantl2018-05-011-7/+7
* [ARM] FP16 vmaxnm/vminnm scalar instructionsSjoerd Meijer2018-04-131-0/+5
* [ARM] FP16 VSEL codegenSjoerd Meijer2018-04-111-4/+10
* [IR][CodeGen] Remove dependency on EVT from IR/Function.cpp. Move EVT to Code...Craig Topper2018-03-291-1/+1
* [ARM] Support float literals under XOChristof Douma2018-03-281-2/+2
* Fix layering by moving ValueTypes.h from CodeGen to IRDavid Blaikie2018-03-231-1/+1
* Fix layering of MachineValueType.h by moving it from CodeGen to SupportDavid Blaikie2018-03-231-1/+1
* [ARM] Support float literals under XOChristof Douma2018-03-231-12/+25
* [ARM, AArch64] Check the no-stack-arg-probe attribute for dynamic stack probesMartin Storsjo2018-03-191-0/+14
* [ARM] Support for v4f16 and v8f16 vectorsSjoerd Meijer2018-03-191-2/+7
* [ARM] FP16 codegen support for VSELSjoerd Meijer2018-03-161-0/+1
* [ARM] Fix for PR36577Sjoerd Meijer2018-03-071-8/+17
* [TLS] use emulated TLS if the target supports only this modeChih-Hung Hsieh2018-02-281-1/+1
* [ARM] Lower lower saturate to 0 and lower saturate to -1 using bit-operationsPablo Barrio2018-02-281-0/+61
* [MachineOperand][Target] MachineOperand::isRenamable semantics changesGeoff Berry2018-02-231-2/+0
* [ARM] Lower BR_CC for f16Sjoerd Meijer2018-02-201-2/+1
* [ARM] Materialise some boolean values to avoid a branchRoger Ferrer Ibanez2018-02-161-10/+89
* [ARM] Allow 64- and 128-bit types with 't' inline asm constraintPablo Barrio2018-02-151-0/+6
* [ARM] Armv8.2-A FP16 code generation (part 3/3)Sjoerd Meijer2018-02-061-0/+21
* [ARM] FullFP16 LowerReturn FixSjoerd Meijer2018-02-011-2/+2
* Revert "[ARM] Lower lower saturate to 0 and lower saturate to -1 using bit-op...Evgeniy Stepanov2018-01-311-20/+0
* [ARM] Lower lower saturate to 0 and lower saturate to -1 using bit-operationsPablo Barrio2018-01-311-0/+20
* [ARM] Armv8.2-A FP16 code generation (part 2/3)Sjoerd Meijer2018-01-311-31/+73
* [ARM] Armv8.2-A FP16 code generation (part 1/3)Sjoerd Meijer2018-01-261-3/+70
* [ARM] Expand long shifts for Thumb1 to __aeabi_ callsWeiming Zhao2018-01-241-0/+7
* [ARM] Call __chkstk for dynamic stack allocation in all windows environmentsMartin Storsjo2018-01-241-2/+2
* [ARM] Optimize {s,u}mul.with.overflow.Joel Galenson2018-01-171-5/+32
* [ARM] Add codegen for SMMULR, SMMLAR and SMMLSRAndre Vieira2018-01-121-55/+98
* [ARM] Optimize {s,u}{add,sub}.with.overflow.Joel Galenson2017-12-201-2/+71
* [ARM] Lower unsigned saturation to USAT Florian Hahn2017-12-201-7/+28
* Silence a bunch of implicit fallthrough warningsAdrian Prantl2017-12-191-1/+1
* X86/AArch64/ARM: Factor out common sincos_stret logic; NFCIMatthias Braun2017-12-181-17/+7
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-28/+28
* TLI: Allow using PSV for intrinsic mem operandsMatt Arsenault2017-12-141-0/+1
* DAG: Expose all MMO flags in getTgtMemIntrinsicMatt Arsenault2017-12-141-18/+8
* [MachineOperand][MIR] Add isRenamable to MachineOperand.Geoff Berry2017-12-121-1/+4
* [ARM] Use ADDCARRY / SUBCARRYRoger Ferrer Ibanez2017-12-111-19/+167
* [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih2017-12-071-1/+1
* Fix function pointer tail calls in armv8-M.basePablo Barrio2017-12-041-0/+7
* [ARM] Allow using emulated tls on platforms other than ELFMartin Storsjo2017-12-041-4/+4
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