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* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-021-8/+8
| | | | | | | | | | | | | | | | | | | | | into their new header subdirectory: include/llvm/IR. This matches the directory structure of lib, and begins to correct a long standing point of file layout clutter in LLVM. There are still more header files to move here, but I wanted to handle them in separate commits to make tracking what files make sense at each layer easier. The only really questionable files here are the target intrinsic tablegen files. But that's a battle I'd rather not fight today. I've updated both CMake and Makefile build systems (I think, and my tests think, but I may have missed something). I've also re-sorted the includes throughout the project. I'll be committing updates to Clang, DragonEgg, and Polly momentarily. llvm-svn: 171366
* Remove the Function::getRetAttributes method in favor of using the ↵Bill Wendling2012-12-301-2/+1
| | | | | | AttributeSet accessor method. llvm-svn: 171256
* Rename the 'Attributes' class to 'Attribute'. It's going to represent a ↵Bill Wendling2012-12-191-6/+6
| | | | | | single attribute in the future. llvm-svn: 170502
* [arm fast-isel] Minor cleanup. No functional change intended.Chad Rosier2012-12-171-10/+6
| | | | llvm-svn: 170379
* [arm fast-isel] Fast-isel only handles simple VTs, so make sure the necessaryChad Rosier2012-12-171-10/+20
| | | | | | checks are in place. Some minor cleanup as well. llvm-svn: 170360
* Revert/correct some FastISel changes in r170104 (EVT->MVT forPatrik Hagglund2012-12-171-11/+19
| | | | | | | | | TargetLowering::getRegClassFor). Some isSimple() guards were missing, or getSimpleVT() were hoisted too far, resulting in asserts on valid LLVM assembly input. llvm-svn: 170336
* Change TargetLowering::getRegClassFor to take an MVT, instead of EVT.Patrik Hagglund2012-12-131-41/+35
| | | | | | | | | | | | Accordingly, add helper funtions getSimpleValueType (in parallel to getValueType) in SDValue, SDNode, and TargetLowering. This is the first, in a series of patches. This is the second attempt. In the first attempt (r169837), a few getSimpleVT() were hoisted too far, detected by bootstrap failures. llvm-svn: 170104
* Revert EVT->MVT changes, r169836-169851, due to buildbot failures.Patrik Hagglund2012-12-111-35/+41
| | | | llvm-svn: 169854
* Change TargetLowering::getRegClassFor to take an MVT, instead of EVT.Patrik Hagglund2012-12-111-41/+35
| | | | | | | | | Accordingly, add helper funtions getSimpleValueType (in parallel to getValueType) in SDValue, SDNode, and TargetLowering. This is the first, in a series of patches. llvm-svn: 169837
* Fall back to the selection dag isel to select tail calls.Chad Rosier2012-12-111-0/+3
| | | | | | | | | | | | | | | | | | | This shouldn't affect codegen for -O0 compiles as tail call markers are not emitted in unoptimized compiles. Testing with the external/internal nightly test suite reveals no change in compile time performance. Testing with -O1, -O2 and -O3 with fast-isel enabled did not cause any compile-time or execution-time failures. All tests were performed on my x86 machine. I'll monitor our arm testers to ensure no regressions occur there. In an upcoming clang patch I will be marking the objc_autoreleaseReturnValue and objc_retainAutoreleaseReturnValue as tail calls unconditionally. While it's theoretically true that this is just an optimization, it's an optimization that we very much want to happen even at -O0, or else ARC applications become substantially harder to debug. Part of rdar://12553082 llvm-svn: 169796
* [arm fast-isel] Make the fast-isel implementation of memcpy respect alignment.Chad Rosier2012-12-061-11/+22
| | | | | | rdar://12821569 llvm-svn: 169460
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-11/+11
| | | | | | | | | | | | | | | | | Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] llvm-svn: 169131
* [arm fast-isel] Appease the machine verifier by using the proper registerChad Rosier2012-11-271-9/+7
| | | | | | | | | classes. The vast majority of the remaining issues are due to uses of invalid registers, which are defined by getRegForValue(). Those will be a little more challenging to cleanup. rdar://12719844 llvm-svn: 168735
* [arm fast-isel] Appease the machine verifier by using the proper registerChad Rosier2012-11-271-2/+4
| | | | | | | classes. rdar://12719844 llvm-svn: 168733
* [arm fast-isel] Appease the machine verifier by using the proper registerChad Rosier2012-11-271-5/+6
| | | | | | | classes. Also a bit of cleanup. rdar://12719844 llvm-svn: 168728
* [arm fast-isel] Appease the machine verifier by using the proper registerChad Rosier2012-11-271-4/+10
| | | | | | | | classes. The associated test case still doesn't pass, but it does have far fewer issues. rdar://12719844 llvm-svn: 168657
* Revert r167620; this can be implemented using an existing CL option.Chad Rosier2012-11-091-8/+4
| | | | llvm-svn: 167622
* Add support for -mstrict-align compiler option for ARM targets.Chad Rosier2012-11-091-4/+8
| | | | | | rdar://12340498 llvm-svn: 167620
* [arm fast-isel] Appease the machine verifier by using the proper registerChad Rosier2012-11-071-1/+4
| | | | | | | classes. For my test case the number of errors drop from 356 to 21. Part of rdar://12594152 llvm-svn: 167508
* When a block ends in an indirect branch, add its successors to the machine ↵Bill Wendling2012-10-221-0/+5
| | | | | | | | | | basic block. The CFG of the machine function needs to know that the targets of the indirect branch are successors to the indirect branch. <rdar://problem/12529625> llvm-svn: 166448
* Use the attribute enums to query if a parameter has an attribute.Bill Wendling2012-10-091-6/+6
| | | | llvm-svn: 165550
* Move TargetData to DataLayout.Micah Villmow2012-10-081-1/+1
| | | | llvm-svn: 165402
* Add methods which query for the specific attribute instead of using theBill Wendling2012-10-031-6/+6
| | | | | | enums. This allows for better encapsulation of the Attributes class. llvm-svn: 165132
* Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. ↵Sylvestre Ledru2012-09-271-1/+1
| | | | | | See: http://en.wikipedia.org/wiki/If_and_only_if Commit 164767 llvm-svn: 164768
* Fix a typo 'iff' => 'if'Sylvestre Ledru2012-09-271-1/+1
| | | | llvm-svn: 164767
* [arm-fast-isel] Add support for ELF PIC.Jush Lu2012-09-271-0/+45
| | | | | | | This is a preliminary step towards ELF support; currently ARMFastISel hasn't been used for ELF object files yet. llvm-svn: 164759
* [fast-isel] Fallback to SelectionDAG isel if we require strict alignment forChad Rosier2012-09-211-0/+6
| | | | | | | non-aligned i32 loads/stores. rdar://12304911 llvm-svn: 164381
* [fast-isel] Fallback to SelectionDAG isel if we require strict alignment forChad Rosier2012-09-211-0/+6
| | | | | | | non-halfword-aligned i16 loads/stores. rdar://12304911 llvm-svn: 164345
* Fix a few old-GCC warnings. No functional change.Nadav Rotem2012-09-061-1/+1
| | | | llvm-svn: 163309
* [arm-fast-isel] Add support for ARM PIC.Jush Lu2012-08-291-6/+16
| | | | llvm-svn: 162823
* Fix call instruction operands in ARMFastISel.Jakob Stoklund Olesen2012-08-241-34/+16
| | | | | | | | | The ARM BL and BLX instructions don't have predicate operands, but the thumb variants tBL and tBLX do. The argument registers should be added as implicit uses. llvm-svn: 162593
* Remove virtual from many methods. These methods replace methods in the base ↵Craig Topper2012-08-181-38/+40
| | | | | | class, but the base class methods aren't virtual so it just increased call overhead. llvm-svn: 162178
* [arm-fast-isel] Add support for fastcc.Jush Lu2012-08-161-3/+6
| | | | | | | | Without fastcc support, the caller just falls through to CallingConv::C for fastcc, but callee still uses fastcc, this inconsistency of calling convention is a problem, and fastcc support can fix it. llvm-svn: 162013
* Fall back to selection DAG isel for calls to builtin functions.Bob Wilson2012-08-031-4/+6
| | | | | | | | | | Fast isel doesn't currently have support for translating builtin function calls to target instructions. For embedded environments where the library functions are not available, this is a matter of correctness and not just optimization. Most of this patch is just arranging to make the TargetLibraryInfo available in fast isel. <rdar://problem/12008746> llvm-svn: 161232
* [arm-fast-isel] Add support for shl, lshr, and ashr.Jush Lu2012-08-031-0/+62
| | | | llvm-svn: 161230
* Add support for the ARM GHC calling convention, this patch was in 3.0,Eric Christopher2012-08-031-0/+5
| | | | | | | | but somehow managed to be dropped later. Patch by Karel Gardas. llvm-svn: 161226
* [arm-fast-isel] Add support for vararg function calls.Jush Lu2012-07-191-28/+36
| | | | llvm-svn: 160500
* Revert r159804, "[arm-fast-isel] Add support for vararg function calls."NAKAMURA Takumi2012-07-061-33/+26
| | | | | | It broke LLVM :: CodeGen/Thumb2/large-call.ll on several hosts. llvm-svn: 159817
* [arm-fast-isel] Add support for vararg function calls.Jush Lu2012-07-061-26/+33
| | | | llvm-svn: 159804
* Cleanup whitespace.Jush Lu2012-06-141-13/+12
| | | | llvm-svn: 158443
* [arm-fast-isel] Add support for -arm-long-calls.Chad Rosier2012-06-121-41/+57
| | | | | | Patch by Jush Lu <jush.msn@gmail.com>. llvm-svn: 158368
* Re-enable the CMN instruction.Bill Wendling2012-06-111-2/+2
| | | | | | | | | We turned off the CMN instruction because it had semantics which we weren't getting correct. If we are comparing with an immediate, then it's okay to use the CMN instruction. <rdar://problem/7569620> llvm-svn: 158302
* [arm-fast-isel] Fix handling of the frameaddress intrinsic. If depth is 0Chad Rosier2012-06-011-1/+1
| | | | | | then DestReg is undefined. llvm-svn: 157840
* [arm-fast-isel] Add support for the llvm.frameaddress() intrinsic.Chad Rosier2012-05-301-0/+36
| | | | | | Patch by Jush Lu <jush.msn@gmail.com>. llvm-svn: 157696
* [arm-fast-isel] Add support for non-global callee.Chad Rosier2012-05-231-7/+17
| | | | | | Patch by Jush Lu <jush.msn@gmail.com>. llvm-svn: 157336
* [fast-isel] Add support for selecting @llvm.trap().Chad Rosier2012-05-111-0/+4
| | | | llvm-svn: 156646
* [fast-isel] Remove -disable-arm-fast-isel option. -fast-isel=0 suffices. ↵Chad Rosier2012-05-111-12/+2
| | | | | | Minor cleanup. llvm-svn: 156632
* [fast-isel] Cleaner fix for when we're unable to handle a non-double multi-regChad Rosier2012-05-111-4/+21
| | | | | | | | retval. Hoists check before emitting the call to avoid unnecessary work. rdar://11430407 PR12796 llvm-svn: 156628
* [fast-isel] Rather then assert (or segfault in a non-asserts build), fall backChad Rosier2012-05-111-2/+4
| | | | | | | | to selection DAG isel if we're unable to handle a non-double multi-reg retval. rdar://11430407 PR12796 llvm-svn: 156622
* The return type is an unsigned, not a bool.Chad Rosier2012-05-111-1/+1
| | | | llvm-svn: 156621
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