summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/ARM/ARMFastISel.cpp
Commit message (Collapse)AuthorAgeFilesLines
...
* The ARM LDRH/STRH instructions use a +/-imm8 encoding, not an imm12.Chad Rosier2011-11-091-5/+13
| | | | | | rdar://10418009 llvm-svn: 144213
* Add support for encoding immediates in icmp and fcmp. Hopefully, this willChad Rosier2011-11-091-12/+64
| | | | | | | remove a fair number of unnecessary materialized constants. rdar://10412592 llvm-svn: 144163
* ARMFastISel doesn't support thumb1. Rename isThumb to isThumb2 to reflect this.Chad Rosier2011-11-081-39/+39
| | | | | | No functional change intended. llvm-svn: 144122
* Enable support for returning i1, i8, and i16. Nothing special todo as it's theChad Rosier2011-11-081-1/+7
| | | | | | | | callee's responsibility to sign or zero-extend the return value. The additional test case just checks to make sure the calls are selected (i.e., -fast-isel-abort doesn't assert). llvm-svn: 144047
* Add support for passing i1, i8, and i16 call parameters. Also, be sure toChad Rosier2011-11-051-28/+16
| | | | | | | zero-extend the constant integer encoding. Test case provides testing for both call parameters and materialization of i1, i8, and i16 types. llvm-svn: 143821
* Cannot create a result register for non-legal types.Chad Rosier2011-11-041-1/+2
| | | | llvm-svn: 143749
* When materializing an i32, SExt vs ZExt doesn't matter when we're trying to fitChad Rosier2011-11-041-1/+1
| | | | | | | | in a 16-bit immediate. However, for the shorter non-legal types (i.e., i1, i8, i16) we should not sign-extend. This prevents us from materializing things such as 'true' (i.e., i1 1). llvm-svn: 143743
* Enable support for materializing i1, i8, and i16 integers via move immediate.Chad Rosier2011-11-041-6/+11
| | | | llvm-svn: 143739
* Indentation.Chad Rosier2011-11-041-1/+1
| | | | llvm-svn: 143670
* Add fast-isel support for returning i1, i8, and i16.Chad Rosier2011-11-041-6/+19
| | | | llvm-svn: 143669
* Add support for sign-extending non-legal types in SelectSIToFP().Chad Rosier2011-11-031-5/+14
| | | | llvm-svn: 143603
* Add support for comparing integer non-legal types.Chad Rosier2011-11-021-16/+33
| | | | llvm-svn: 143559
* Factor out an EmitIntExt function. No functionality change intended.Chad Rosier2011-11-021-31/+37
| | | | llvm-svn: 143547
* Factor out a SelectTrunc function. No functionality change intended.Chad Rosier2011-11-021-17/+28
| | | | llvm-svn: 143523
* A branch predicated on a constant can just FastEmit an unconditional branch.Chad Rosier2011-10-271-0/+6
| | | | llvm-svn: 143086
* Add a TODO comment. FastISel works by parsing each basic block from the bottomChad Rosier2011-10-261-0/+1
| | | | | | | | up. Thus, improving the support for compares is goodness because it increases the number of terminator instructions we can handle. This creates many more opportunities for target specific fast-isel. llvm-svn: 143079
* Factor a little more code into EmitCmp, which should have been done in the firstChad Rosier2011-10-261-23/+16
| | | | | | place. No functional change intended. llvm-svn: 143078
* Use EmitCmp in SelectBranch. No functional change intended.Chad Rosier2011-10-261-33/+6
| | | | llvm-svn: 143076
* Factor out an EmitCmp function that can be used by both SelectCmp andChad Rosier2011-10-261-18/+24
| | | | | | SelectBranch. No functional change intended. llvm-svn: 143072
* Add a few FIXME comments.Chad Rosier2011-10-171-0/+2
| | | | llvm-svn: 142299
* Switch over to using ARMConstantPoolConstant for global variables, functions,Bill Wendling2011-10-011-2/+3
| | | | | | and block addresses. llvm-svn: 140936
* ARM fix encoding of VMOV.f32 and VMOV.f64 immediates.Jim Grosbach2011-09-301-2/+10
| | | | | | | | | | | Encode the immediate into its 8-bit form as part of isel rather than later, which simplifies things for mapping the encoding bits, allows the removal of the custom disassembler decoding hook, makes the operand printer trivial, and prepares things more cleanly for handling these in the asm parser. rdar://10211428 llvm-svn: 140834
* Tidy up a few 80 column violations.Jim Grosbach2011-09-131-3/+3
| | | | llvm-svn: 139636
* Don't fast-isel for atomic load/store; some cases require extra handling ↵Eli Friedman2011-09-021-0/+8
| | | | | | missing from fast-isel. llvm-svn: 139044
* Fixup for functions that return a bool.Chad Rosier2011-08-311-2/+2
| | | | llvm-svn: 138918
* [SU]XT[BH] are only available on ARMv6 and up.Jim Grosbach2011-08-231-0/+2
| | | | llvm-svn: 138373
* ARM extend instructions simplification.Jim Grosbach2011-07-271-4/+6
| | | | | | | | Refactor the SXTB, SXTH, SXTB16, UXTB, UXTH, and UXTB16 instructions to not have an 'r' and an 'r_rot' version, but just a single version with a rotate that can be zero. Use plain Pat<>'s for the ISel of the non-rotated version. llvm-svn: 136225
* Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate ↵Evan Cheng2011-07-201-1/+1
| | | | | | ARM MC code from target. llvm-svn: 135636
* land David Blaikie's patch to de-constify Type, with a few tweaks.Chris Lattner2011-07-181-22/+22
| | | | llvm-svn: 135375
* Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.Evan Cheng2011-06-281-2/+2
| | | | llvm-svn: 134030
* - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng2011-06-281-15/+15
| | | | | | | | sink them into MC layer. - Added MCInstrInfo, which captures the tablegen generated static data. Chang TargetInstrInfo so it's based off MCInstrInfo. llvm-svn: 134021
* Add a parameter to CCState so that it can access the MachineFunction.Eric Christopher2011-06-081-6/+6
| | | | | | | | No functional change. Part of PR6965 llvm-svn: 132763
* Add ARM fast-isel support for materializing the address of a global in cases ↵Eli Friedman2011-06-031-3/+17
| | | | | | | | where the global uses an indirect symbol. rdar://9431157 llvm-svn: 132522
* Fix ARM fast isel to correctly flag memory operands to stores. This fixesCameron Zwarich2011-05-281-5/+7
| | | | | | -verify-machineinstrs failures on several tests. llvm-svn: 132268
* Fix a silly mistake (which trips over an assertion) in r132099. rdar://9515076Eli Friedman2011-05-271-0/+2
| | | | llvm-svn: 132194
* Rewrite fast-isel integer cast handling to handle more cases, and to be ↵Eli Friedman2011-05-251-1/+77
| | | | | | | | | | simpler and more consistent. The practical effects here are that x86-64 fast-isel can now handle trunc from i8 to i1, and ARM fast-isel can handle many more constructs involving integers narrower than 32 bits (including loads, stores, and many integer casts). rdar://9437928 . llvm-svn: 132099
* Prepare ARMFastISel::SelectSIToFP for getRegForValue returning registers for ↵Eli Friedman2011-05-251-0/+4
| | | | | | i8 and i16 values. llvm-svn: 132073
* Kill some dead code.Jim Grosbach2011-05-161-3/+1
| | | | llvm-svn: 131431
* Apparently the check for direct calls is unnecessary.Eric Christopher2011-05-021-2/+2
| | | | llvm-svn: 130716
* Switch to ImmLeaf (which can be used by FastISel) for a few more common ↵Eli Friedman2011-04-291-0/+1
| | | | | | ARM/Thumb2 patterns. llvm-svn: 130552
* Add FastEmitInst_ii for the arm fast isel generator. It doesn't use it, butEric Christopher2011-04-291-0/+23
| | | | | | if it ever did it needs the def machinery. llvm-svn: 130549
* Some cleanup and optimize fallthrough more.Eric Christopher2011-04-291-8/+13
| | | | llvm-svn: 130546
* Re-committing r130454, which does not in fact break anything.Eli Friedman2011-04-291-19/+2
| | | | | | | Fix a rather obscure crash caused by ARM fast-isel generating code which redefines a register. rdar://problem/9338332 . llvm-svn: 130539
* Add trunc->branch support, this won't help with clang's i8->i1 truncationsEric Christopher2011-04-291-1/+24
| | | | | | for bools, but is a start. llvm-svn: 130534
* Update comments and checks to match reality.Eric Christopher2011-04-291-9/+2
| | | | llvm-svn: 130464
* Whitespace.Eric Christopher2011-04-291-11/+11
| | | | llvm-svn: 130463
* Revert r130454; apparently this doesn't actually work.Eli Friedman2011-04-281-2/+19
| | | | llvm-svn: 130462
* Fix a rather obscure crash caused by ARM fast-isel generating code which ↵Eli Friedman2011-04-281-19/+2
| | | | | | | | redefines a register. rdar://problem/9338332 . llvm-svn: 130454
* Be more layout aware here and swap the successor and branch conditionEric Christopher2011-04-281-1/+8
| | | | | | if it means we get a fallthrough. llvm-svn: 130404
* Correct result when a branch condition is live across a blockStuart Hastings2011-04-161-4/+10
| | | | | | boundary. <rdar://problem/8933028> llvm-svn: 129634
OpenPOWER on IntegriCloud