| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | ARM extend instructions simplification. | Jim Grosbach | 2011-07-27 | 1 | -4/+6 |
| | | | | | | | | | Refactor the SXTB, SXTH, SXTB16, UXTB, UXTH, and UXTB16 instructions to not have an 'r' and an 'r_rot' version, but just a single version with a rotate that can be zero. Use plain Pat<>'s for the ISel of the non-rotated version. llvm-svn: 136225 | ||||
| * | Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate ↵ | Evan Cheng | 2011-07-20 | 1 | -1/+1 |
| | | | | | | | ARM MC code from target. llvm-svn: 135636 | ||||
| * | land David Blaikie's patch to de-constify Type, with a few tweaks. | Chris Lattner | 2011-07-18 | 1 | -22/+22 |
| | | | | | llvm-svn: 135375 | ||||
| * | Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo. | Evan Cheng | 2011-06-28 | 1 | -2/+2 |
| | | | | | llvm-svn: 134030 | ||||
| * | - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and | Evan Cheng | 2011-06-28 | 1 | -15/+15 |
| | | | | | | | | | sink them into MC layer. - Added MCInstrInfo, which captures the tablegen generated static data. Chang TargetInstrInfo so it's based off MCInstrInfo. llvm-svn: 134021 | ||||
| * | Add a parameter to CCState so that it can access the MachineFunction. | Eric Christopher | 2011-06-08 | 1 | -6/+6 |
| | | | | | | | | | No functional change. Part of PR6965 llvm-svn: 132763 | ||||
| * | Add ARM fast-isel support for materializing the address of a global in cases ↵ | Eli Friedman | 2011-06-03 | 1 | -3/+17 |
| | | | | | | | | | where the global uses an indirect symbol. rdar://9431157 llvm-svn: 132522 | ||||
| * | Fix ARM fast isel to correctly flag memory operands to stores. This fixes | Cameron Zwarich | 2011-05-28 | 1 | -5/+7 |
| | | | | | | | -verify-machineinstrs failures on several tests. llvm-svn: 132268 | ||||
| * | Fix a silly mistake (which trips over an assertion) in r132099. rdar://9515076 | Eli Friedman | 2011-05-27 | 1 | -0/+2 |
| | | | | | llvm-svn: 132194 | ||||
| * | Rewrite fast-isel integer cast handling to handle more cases, and to be ↵ | Eli Friedman | 2011-05-25 | 1 | -1/+77 |
| | | | | | | | | | | | simpler and more consistent. The practical effects here are that x86-64 fast-isel can now handle trunc from i8 to i1, and ARM fast-isel can handle many more constructs involving integers narrower than 32 bits (including loads, stores, and many integer casts). rdar://9437928 . llvm-svn: 132099 | ||||
| * | Prepare ARMFastISel::SelectSIToFP for getRegForValue returning registers for ↵ | Eli Friedman | 2011-05-25 | 1 | -0/+4 |
| | | | | | | | i8 and i16 values. llvm-svn: 132073 | ||||
| * | Kill some dead code. | Jim Grosbach | 2011-05-16 | 1 | -3/+1 |
| | | | | | llvm-svn: 131431 | ||||
| * | Apparently the check for direct calls is unnecessary. | Eric Christopher | 2011-05-02 | 1 | -2/+2 |
| | | | | | llvm-svn: 130716 | ||||
| * | Switch to ImmLeaf (which can be used by FastISel) for a few more common ↵ | Eli Friedman | 2011-04-29 | 1 | -0/+1 |
| | | | | | | | ARM/Thumb2 patterns. llvm-svn: 130552 | ||||
| * | Add FastEmitInst_ii for the arm fast isel generator. It doesn't use it, but | Eric Christopher | 2011-04-29 | 1 | -0/+23 |
| | | | | | | | if it ever did it needs the def machinery. llvm-svn: 130549 | ||||
| * | Some cleanup and optimize fallthrough more. | Eric Christopher | 2011-04-29 | 1 | -8/+13 |
| | | | | | llvm-svn: 130546 | ||||
| * | Re-committing r130454, which does not in fact break anything. | Eli Friedman | 2011-04-29 | 1 | -19/+2 |
| | | | | | | | | Fix a rather obscure crash caused by ARM fast-isel generating code which redefines a register. rdar://problem/9338332 . llvm-svn: 130539 | ||||
| * | Add trunc->branch support, this won't help with clang's i8->i1 truncations | Eric Christopher | 2011-04-29 | 1 | -1/+24 |
| | | | | | | | for bools, but is a start. llvm-svn: 130534 | ||||
| * | Update comments and checks to match reality. | Eric Christopher | 2011-04-29 | 1 | -9/+2 |
| | | | | | llvm-svn: 130464 | ||||
| * | Whitespace. | Eric Christopher | 2011-04-29 | 1 | -11/+11 |
| | | | | | llvm-svn: 130463 | ||||
| * | Revert r130454; apparently this doesn't actually work. | Eli Friedman | 2011-04-28 | 1 | -2/+19 |
| | | | | | llvm-svn: 130462 | ||||
| * | Fix a rather obscure crash caused by ARM fast-isel generating code which ↵ | Eli Friedman | 2011-04-28 | 1 | -19/+2 |
| | | | | | | | | | redefines a register. rdar://problem/9338332 . llvm-svn: 130454 | ||||
| * | Be more layout aware here and swap the successor and branch condition | Eric Christopher | 2011-04-28 | 1 | -1/+8 |
| | | | | | | | if it means we get a fallthrough. llvm-svn: 130404 | ||||
| * | Correct result when a branch condition is live across a block | Stuart Hastings | 2011-04-16 | 1 | -4/+10 |
| | | | | | | | boundary. <rdar://problem/8933028> llvm-svn: 129634 | ||||
| * | Don't include Operator.h from InstrTypes.h. | Jay Foad | 2011-04-11 | 1 | -0/+1 |
| | | | | | llvm-svn: 129271 | ||||
| * | Just use BL all the time. It's safer that way. | Eric Christopher | 2011-04-05 | 1 | -9/+1 |
| | | | | | | | Fixes rdar://9184526 llvm-svn: 128869 | ||||
| * | Add a ARM-specific SD node for VBSL so that forms with a constant first operand | Cameron Zwarich | 2011-03-30 | 1 | -0/+30 |
| | | | | | | | can be recognized. This fixes <rdar://problem/9183078>. llvm-svn: 128584 | ||||
| * | Migrate the fix in r128041 to ARM's fastisel support as well. | Eric Christopher | 2011-03-22 | 1 | -13/+18 |
| | | | | | | | Fixes rdar://9169640 llvm-svn: 128100 | ||||
| * | Sometimes isPredicable lies to us and tells us we don't need the operands. | Eric Christopher | 2011-03-12 | 1 | -6/+25 |
| | | | | | | | | | | Go ahead and add them on when we might want to use them and let later passes remove them. Fixes rdar://9118569 llvm-svn: 127518 | ||||
| * | Only use blx for external function calls on thumb, these could be fixed | Eric Christopher | 2011-02-22 | 1 | -12/+26 |
| | | | | | | | | | | up by the dynamic linker, but it's better to use the correct instruction to begin with. Fixes rdar://9011034 llvm-svn: 126176 | ||||
| * | Use the incoming VT not the VT of where we're trying to store to determine | Eric Christopher | 2011-01-27 | 1 | -2/+2 |
| | | | | | | | | | if we can store a value. Also, the exclusion is or, not and. Fixes rdar://8920247. llvm-svn: 124357 | ||||
| * | Remove unused variables found by gcc-4.6's -Wunused-but-set-variable. | Jeffrey Yasskin | 2011-01-18 | 1 | -4/+0 |
| | | | | | llvm-svn: 123707 | ||||
| * | Materialize GA addresses with movw + movt pairs for Darwin in PIC mode. e.g. | Evan Cheng | 2011-01-17 | 1 | -1/+1 |
| | | | | | | | | | | | | | movw r0, :lower16:(L_foo$non_lazy_ptr-(LPC0_0+4)) movt r0, :upper16:(L_foo$non_lazy_ptr-(LPC0_0+4)) LPC0_0: add r0, pc, r0 It's not yet enabled by default as some tests are failing. I suspect bugs in down stream tools. llvm-svn: 123619 | ||||
| * | fix some -Wself-assign warnings. | Chris Lattner | 2011-01-05 | 1 | -3/+3 |
| | | | | | llvm-svn: 122893 | ||||
| * | Arm and thumb call instructions are also in different orders. | Eric Christopher | 2010-12-21 | 1 | -13/+24 |
| | | | | | | | Fixes rdar://8782223 llvm-svn: 122313 | ||||
| * | Don't handle -arm-long-calls in fast isel for now. | Eric Christopher | 2010-12-15 | 1 | -0/+8 |
| | | | | | llvm-svn: 121919 | ||||
| * | Refactor load/store handling again. Simplify and make some room for | Eric Christopher | 2010-12-01 | 1 | -103/+60 |
| | | | | | | | reg+reg handling. llvm-svn: 120526 | ||||
| * | Noticed this on inspection, fix and update some comments. | Eric Christopher | 2010-11-30 | 1 | -3/+4 |
| | | | | | llvm-svn: 120447 | ||||
| * | Update fastisel for the changes in r120272. | Eric Christopher | 2010-11-29 | 1 | -3/+7 |
| | | | | | llvm-svn: 120324 | ||||
| * | Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept. | Wesley Peck | 2010-11-23 | 1 | -1/+1 |
| | | | | | llvm-svn: 119990 | ||||
| * | Rewrite address handling to use a structure with all the possible address | Eric Christopher | 2010-11-20 | 1 | -11/+76 |
| | | | | | | | mode variables. Handle frame indexes in load/store and allocas again. llvm-svn: 119912 | ||||
| * | STRH only needs the additional operand, not t2STRH. Also invert conditional | Eric Christopher | 2010-11-20 | 1 | -9/+5 |
| | | | | | | | to match the one from the load emitter above. llvm-svn: 119911 | ||||
| * | Don't need to save piecemeal now. | Eric Christopher | 2010-11-19 | 1 | -4/+2 |
| | | | | | llvm-svn: 119862 | ||||
| * | Update comment. | Eric Christopher | 2010-11-19 | 1 | -3/+2 |
| | | | | | llvm-svn: 119861 | ||||
| * | Update comment. | Eric Christopher | 2010-11-19 | 1 | -1/+1 |
| | | | | | llvm-svn: 119859 | ||||
| * | Refactor address mode handling into a single struct (ala x86), this | Eric Christopher | 2010-11-19 | 1 | -50/+72 |
| | | | | | | | | | should give allow a wider range of addressing modes. No functional change. llvm-svn: 119856 | ||||
| * | Remove hard tabs. | Jim Grosbach | 2010-11-19 | 1 | -2/+2 |
| | | | | | llvm-svn: 119810 | ||||
| * | Recommit this change and remove the failing part of the test - it didn't | Eric Christopher | 2010-11-15 | 1 | -4/+5 |
| | | | | | | | | pass in the first place and was masked by earlier failures not warning and aborting the block. llvm-svn: 119184 | ||||
| * | Temporarily revert this. | Eric Christopher | 2010-11-12 | 1 | -5/+4 |
| | | | | | llvm-svn: 118946 | ||||
| * | Make this happen for ARM like x86. Don't entirely bail out when | Eric Christopher | 2010-11-12 | 1 | -4/+5 |
| | | | | | | | | an address is in a different block, get it into a register and go from there. llvm-svn: 118936 | ||||
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