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* [ARM] Add support for embedded position-independent codeOliver Stannard2016-08-081-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for some new relocation models to the ARM backend: * Read-only position independence (ROPI): Code and read-only data is accessed PC-relative. The offsets between all code and RO data sections are known at static link time. This does not affect read-write data. * Read-write position independence (RWPI): Read-write data is accessed relative to the static base register (r9). The offsets between all writeable data sections are known at static link time. This does not affect read-only data. These two modes are independent (they specify how different objects should be addressed), so they can be used individually or together. They are otherwise the same as the "static" relocation model, and are not compatible with SysV-style PIC using a global offset table. These modes are normally used by bare-metal systems or systems with small real-time operating systems. They are designed to avoid the need for a dynamic linker, the only initialisation required is setting r9 to an appropriate value for RWPI code. I have only added support to SelectionDAG, not FastISel, because FastISel is currently disabled for bare-metal targets where these modes would be used. Differential Revision: https://reviews.llvm.org/D23195 llvm-svn: 278015
* ARM: correct TLS access on WoASaleem Abdulrasool2016-06-071-0/+2
| | | | | | | | | | | | TLS access requires an offset from the TLS index. The index itself is the section-relative distance of the symbol. For ARM, the relevant relocation (IMAGE_REL_ARM_SECREL) is applied as a constant. This means that the value may not be an immediate and must be lowered into a constant pool. This offset will not be base relocated. We were previously emitting the actual address of the symbol which would be base relocated and would therefore be the vaue offset by the ImageBase + TLS Offset. llvm-svn: 271974
* ARM: clang-format a couple of switches, add commentsSaleem Abdulrasool2016-06-071-5/+10
| | | | | | | clang-format a couple of switches in preparation for a future change. Add some enumeration comments llvm-svn: 271973
* ARM: don't attempt to merge litpools referencing different PC-anchors.Tim Northover2016-05-051-3/+3
| | | | | | | | | | | | | | | | | | | | | | Given something like: ldr r0, .LCPI0_0 (== pc-rel var) add r0, pc ldr r1, .LCPI0_1 (== pc-rel var) add r1, pc we cannot combine the 2 ldr instructions and litpools because they get added to a different pc to form the correct address. I think the original logic came from a time when we fused the LDRpci/PICADD instructions into one pseudo-instruction so the PC was always immediately at-hand. That's no longer the case. Should fix general-dynamic TLS access on Linux, and quite possibly other -fPIC code that relies on litpools (e.g. v6m and -Oz compilations) though trivial tweaks of the .ll test didn't provoke anything. llvm-svn: 268662
* Annotate dump() methods with LLVM_DUMP_METHOD, addressing Richard Smith ↵Yaron Keren2016-01-291-1/+1
| | | | | | | | r259192 post commit comment. clang part in r259232, this is the LLVM part of the patch. llvm-svn: 259240
* ARM/ELF: Better codegen for global variable addresses.Peter Collingbourne2015-10-261-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In PIC mode we were previously computing global variable addresses (or GOT entry addresses) by adding the PC, the PC-relative GOT displacement and the GOT-relative symbol/GOT entry displacement. Because the latter two displacements are fixed, we ended up performing one more addition than necessary. This change causes us to compute addresses using a single PC-relative displacement, resulting in a shorter code sequence. This reduces code size by about 4% in a recent build of Chromium for Android. As a result of this change we no longer need to compute the GOT base address in the ARM backend, which allows us to remove the Global Base Reg pass and SDAG lowering for the GOT. We also now no longer use the GOT when addressing a symbol which is known to be defined in the same linkage unit. Specifically, the symbol must have either hidden visibility or a strong definition in the current module in order to not use the the GOT. This is a change from the previous behaviour where we would use the GOT to address externally visible symbols defined in the same module. I think the only cases where this could matter are cases involving symbol interposition, but we don't really support that well anyway. Differential Revision: http://reviews.llvm.org/D13650 llvm-svn: 251322
* ARM: Deduplicate ConstantPoolValues.Benjamin Kramer2013-09-161-47/+3
| | | | llvm-svn: 190779
* Replace some unnecessary vector copies with references.Benjamin Kramer2013-09-151-3/+3
| | | | llvm-svn: 190770
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-021-4/+4
| | | | | | | | | | | | | | | | | | | | | into their new header subdirectory: include/llvm/IR. This matches the directory structure of lib, and begins to correct a long standing point of file layout clutter in LLVM. There are still more header files to move here, but I wanted to handle them in separate commits to make tracking what files make sense at each layer easier. The only really questionable files here are the target intrinsic tablegen files. But that's a battle I'd rather not fight today. I've updated both CMake and Makefile build systems (I think, and my tests think, but I may have missed something). I've also re-sorted the includes throughout the project. I'll be committing updates to Clang, DragonEgg, and Polly momentarily. llvm-svn: 171366
* Use a std::string rather than a dynamically allocated char* buffer.Benjamin Kramer2012-12-241-17/+4
| | | | | | | | | | | | | This affords us to use std::string's allocation routines and use the destructor for the memory management. Switching to that also means that we can use operator==(const std::string&, const char *) to perform the string comparison rather than resorting to libc functionality (i.e. strcmp). Patch by Saleem Abdulrasool! Differential Revision: http://llvm-reviews.chandlerc.com/D230 llvm-svn: 171042
* Cleanup compiler warnings on discarding type qualifiers in casts. Switch to ↵Benjamin Kramer2012-12-211-1/+1
| | | | | | | | | | C++ style casts. Patch by Saleem Abdulrasool! Differential Revision: http://llvm-reviews.chandlerc.com/D204 llvm-svn: 170917
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-2/+2
| | | | | | | | | | | | | | | | | Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] llvm-svn: 169131
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, ↵Jia Liu2012-02-181-1/+1
| | | | | | MSP430, PPC, PTX, Sparc, X86, XCore. llvm-svn: 150878
* Convert assert(0) to llvm_unreachableCraig Topper2012-02-071-2/+1
| | | | llvm-svn: 149961
* Removing unused default switch cases in switches over enums that already ↵David Blaikie2012-01-161-1/+1
| | | | | | | | account for all enumeration values explicitly. (This time I believe I've checked all the -Wreturn-type warnings from GCC & added the couple of llvm_unreachables necessary to silence them. If I've missed any, I'll happily fix them as soon as I know about them) llvm-svn: 148262
* ARMConstantPoolMBB::print should print BB number.Evan Cheng2011-10-241-0/+1
| | | | llvm-svn: 142867
* No one should be using the method directly. Assert if they do.Bill Wendling2011-10-011-12/+1
| | | | llvm-svn: 140947
* Add a convenience method to tell if two things are equal.Bill Wendling2011-10-011-16/+4
| | | | llvm-svn: 140946
* Use the ARMConstantPoolMBB class to handle the MBB values.Bill Wendling2011-10-011-21/+5
| | | | llvm-svn: 140943
* Add ARMConstantPoolMBB to hold an MBB value in the constant pool.Bill Wendling2011-10-011-0/+57
| | | | llvm-svn: 140942
* Remove dead code.Bill Wendling2011-10-011-9/+0
| | | | llvm-svn: 140941
* Remove now dead methods and ivar.Bill Wendling2011-10-011-28/+12
| | | | llvm-svn: 140940
* Use the new ARMConstantPoolSymbol class to handle external symbols.Bill Wendling2011-10-011-2/+7
| | | | llvm-svn: 140939
* Add an ARMConstantPool class for external symbols. This will split out the ↵Bill Wendling2011-10-011-4/+78
| | | | | | support for external symbols from the base class. llvm-svn: 140938
* Remove now dead methods and ivar from ARMConstantPoolValue.Bill Wendling2011-10-011-28/+3
| | | | llvm-svn: 140937
* Switch over to using ARMConstantPoolConstant for global variables, functions,Bill Wendling2011-10-011-5/+2
| | | | | | and block addresses. llvm-svn: 140936
* Some more refactoring.Bill Wendling2011-10-011-6/+60
| | | | | | | | * Add a couple of Create methods to the ARMConstantPoolConstant class, * Add its own version of getExistingMachineCPValue, and * Modify hasSameValue to return false if the object isn't an ARMConstantPoolConstant. llvm-svn: 140935
* Add a Create method that accepts 'kind' and 'pcadj' arguments.Bill Wendling2011-10-011-0/+7
| | | | llvm-svn: 140934
* Refactoring: Separate out the ARM constant pool Constant from the ARM constantBill Wendling2011-10-011-1/+53
| | | | | | | | pool value. It's not used right now, but will be soon. llvm-svn: 140933
* Constify 'isLSDA' and move a method out-of-line.Bill Wendling2011-09-301-0/+14
| | | | llvm-svn: 140868
* Support creating a constant pool value for a machine basic block.Bill Wendling2011-09-291-0/+18
| | | | | | | This is used when we want to take the address of a machine basic block, but it's not associated with a BB in LLVM IR. llvm-svn: 140823
* Rename AddSelectionDAGCSEId() to addSelectionDAGCSEId().Jim Grosbach2011-09-271-1/+1
| | | | | | Naming conventions consistency. No functional change. llvm-svn: 140636
* land David Blaikie's patch to de-constify Type, with a few tweaks.Chris Lattner2011-07-181-3/+3
| | | | llvm-svn: 135375
* Initialize an ARMConstantPoolValue field.Jan Wen Voung2010-12-011-1/+1
| | | | llvm-svn: 120525
* Change the ARMConstantPoolValue modifier string to an enumeration. This willJim Grosbach2010-11-091-6/+6
| | | | | | help in MC'izing the references that use them. llvm-svn: 118633
* Fix a potential null dereference bug.Evan Cheng2010-09-241-4/+12
| | | | llvm-svn: 114723
* Add const qualifiers to CodeGen's use of LLVM IR constructs.Dan Gohman2010-04-151-4/+5
| | | | llvm-svn: 101334
* - Add TargetInstrInfo::isIdentical(). It's similar to MachineInstr::isIdenticalEvan Cheng2009-11-071-2/+20
| | | | | | | | | | except it doesn't care if the definitions' virtual registers differ. This is used by machine LICM and other MI passes to perform CSE. - Teach Thumb2InstrInfo::isIdentical() to check two t2LDRpci_pic are identical. Since pc relative constantpool entries are always different, this requires it it check if the values can actually the same. llvm-svn: 86328
* Add support for BlockAddress values in ARM constant pools.Bob Wilson2009-11-021-10/+20
| | | | llvm-svn: 85806
* Fix compiler warningsJim Grosbach2009-09-011-1/+1
| | | | llvm-svn: 80650
* Clean up LSDA name generation and use for SJLJ exception handling. ThisJim Grosbach2009-09-011-3/+4
| | | | | | | | | | | makes an eggregious hack somewhat more palatable. Bringing the LSDA forward and making it a GV available for reference would be even better, but is beyond the scope of what I'm looking to solve at this point. Objective C++ code could generate function names that broke the previous scheme. This fixes that. llvm-svn: 80649
* Let Darwin linker auto-synthesize stubs and lazy-pointers. This deletes a ↵Evan Cheng2009-08-281-12/+4
| | | | | | bunch of nasty code in ARM asm printer. llvm-svn: 80404
* remove various std::ostream version of printing methods fromChris Lattner2009-08-231-6/+1
| | | | | | | | MachineInstr and MachineOperand. This required eliminating a bunch of stuff that was using DOUT, I hope that bill doesn't mind me stealing his fun. ;-) llvm-svn: 79813
* Push LLVMContexts through the IntegerType APIs.Owen Anderson2009-08-131-3/+4
| | | | llvm-svn: 78948
* This void is implicit in C++.Benjamin Kramer2009-08-111-1/+1
| | | | llvm-svn: 78678
* Move ~ARMConstantPoolValue() to the .cpp file to avoid needing to include ↵Jim Grosbach2009-08-111-0/+5
| | | | | | <cstdlib> in the header. llvm-svn: 78665
* SjLj based exception handling unwinding support. This patch is nasty, brutishJim Grosbach2009-08-111-1/+1
| | | | | | | | | | | | | and short. Well, it's kinda short. Definitely nasty and brutish. The front-end generates the register/unregister calls into the SjLj runtime, call-site indices and landing pad dispatch. The back end fills in the LSDA with the call-site information provided by the front end. Catch blocks are not yet implemented. Built on Darwin and verified no llvm-core "make check" regressions. llvm-svn: 78625
* Remove some unnecessary #includes.Dan Gohman2009-06-051-1/+0
| | | | llvm-svn: 72948
* Fix some significant problems with constant pools that resulted in ↵Evan Cheng2009-03-131-2/+2
| | | | | | | | | | | | | | | | | | | | | | | unnecessary paddings between constant pool entries, larger than necessary alignments (e.g. 8 byte alignment for .literal4 sections), and potentially other issues. 1. ConstantPoolSDNode alignment field is log2 value of the alignment requirement. This is not consistent with other SDNode variants. 2. MachineConstantPool alignment field is also a log2 value. 3. However, some places are creating ConstantPoolSDNode with alignment value rather than log2 values. This creates entries with artificially large alignments, e.g. 256 for SSE vector values. 4. Constant pool entry offsets are computed when they are created. However, asm printer group them by sections. That means the offsets are no longer valid. However, asm printer uses them to determine size of padding between entries. 5. Asm printer uses expensive data structure multimap to track constant pool entries by sections. 6. Asm printer iterate over SmallPtrSet when it's emitting constant pool entries. This is non-deterministic. Solutions: 1. ConstantPoolSDNode alignment field is changed to keep non-log2 value. 2. MachineConstantPool alignment field is also changed to keep non-log2 value. 3. Functions that create ConstantPool nodes are passing in non-log2 alignments. 4. MachineConstantPoolEntry no longer keeps an offset field. It's replaced with an alignment field. Offsets are not computed when constant pool entries are created. They are computed on the fly in asm printer and JIT. 5. Asm printer uses cheaper data structure to group constant pool entries. 6. Asm printer compute entry offsets after grouping is done. 7. Change JIT code to compute entry offsets on the fly. llvm-svn: 66875
* Handle ARM machine constantpool entries.Evan Cheng2008-11-041-4/+2
| | | | llvm-svn: 58671
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