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path: root/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
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* Radar numbers don't belong in source code.Evan Cheng2013-02-211-1/+1
| | | | llvm-svn: 175775
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-021-1/+1
| | | | | | | | | | | | | | | | | | | | | into their new header subdirectory: include/llvm/IR. This matches the directory structure of lib, and begins to correct a long standing point of file layout clutter in LLVM. There are still more header files to move here, but I wanted to handle them in separate commits to make tracking what files make sense at each layer easier. The only really questionable files here are the target intrinsic tablegen files. But that's a battle I'd rather not fight today. I've updated both CMake and Makefile build systems (I think, and my tests think, but I may have missed something). I've also re-sorted the includes throughout the project. I'll be committing updates to Clang, DragonEgg, and Polly momentarily. llvm-svn: 171366
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-7/+7
| | | | | | | | | | | | | | | | | Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] llvm-svn: 169131
* Move TargetData to DataLayout.Micah Villmow2012-10-081-2/+2
| | | | llvm-svn: 165402
* Reduce duplicated hash map lookups.Benjamin Kramer2012-08-221-3/+2
| | | | llvm-svn: 162362
* Fix the naming of ensureAlignment. Per the coding standard function namesChad Rosier2012-07-061-3/+3
| | | | | | should be camel case, and start with a lower case letter. llvm-svn: 159877
* Fix address calculation error from r155744.Jakob Stoklund Olesen2012-04-301-1/+6
| | | | | | | | | | | | This was exposed by SingleSource/UnitTests/Vector/constpool.c. The computed size of a basic block isn't always a multiple of its known alignment, and that can introduce extra alignment padding after the block. <rdar://problem/11347135> llvm-svn: 155845
* Fix a problem with blocks that need to be split twice.Jakob Stoklund Olesen2012-04-281-3/+5
| | | | | | | | | The code could search past the end of the basic block when there was already a constant pool entry after the block. Test case with giant basic block in SingleSource/UnitTests/Vector/constpool.c llvm-svn: 155753
* Track worst case alignment padding more accurately.Jakob Stoklund Olesen2012-04-271-42/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously, ARMConstantIslandPass would conservatively compute the address of an aligned basic block as: RoundUpToAlignment(Offset + UnknownPadding) This worked fine for the layout algorithm itself, but it could fool the verify() function because it accounts for alignment padding twice: Once when adding the worst case UnknownPadding, and again by rounding up the fictional block offset. This meant that when optimizeThumb2Instructions would shrink an instruction, the conservative distance estimate could grow. That shouldn't be possible since the woorst case alignment padding wss already included. This patch drops the use of RoundUpToAlignment, and depends only on worst case padding to compute conservative block offsets. This has the weird effect that the computed offset for an aligned block may not be aligned. The important difference is that shrinking an instruction can never cause the estimated distance between two instructions to grow. The estimated distance is always larger than the real distance that only the assembler knows. <rdar://problem/11339352> llvm-svn: 155744
* Add a 2 byte safety margin in offset computations.Jakob Stoklund Olesen2012-03-311-2/+5
| | | | | | | | | | | | ARMConstantIslandPass still has bugs where jump table compression can cause constant pool entries to go out of range. Add a safety margin of 2 bytes when placing constant islands, but use the real max displacement for verification. <rdar://problem/11156595> llvm-svn: 153789
* Add more debugging output to ARMConstantIslandPass.Jakob Stoklund Olesen2012-03-311-2/+16
| | | | llvm-svn: 153788
* Invalidate liveness in ARMConstantIslandPass.Jakob Stoklund Olesen2012-03-291-0/+4
| | | | | | | | | | This pass splits basic blocks to insert constant islands, and it doesn't recompute the live-in lists. No later passes depend on accurate liveness information. This fixes PR12410 where the machine code verifier was complaining. llvm-svn: 153700
* Remove unnecessary llvm:: qualificationsCraig Topper2012-03-271-3/+3
| | | | llvm-svn: 153500
* Replace uses of ARMBaseInstrInfo and ARMTargetMachine with the Base versions.Craig Topper2012-03-251-3/+2
| | | | llvm-svn: 153421
* ARM tidy up ARMConstantIsland.cpp.Jim Grosbach2012-03-231-156/+158
| | | | | | No functional change, just tidy up the code and nomenclature a bit. llvm-svn: 153347
* Refactor loop for better readability.Jim Grosbach2012-01-311-3/+2
| | | | | | Excellent suggestion from Ben Kramer. llvm-svn: 149417
* Add explanatory comment.Jim Grosbach2012-01-311-0/+1
| | | | llvm-svn: 149416
* More dead code removal (using -Wunreachable-code)David Blaikie2012-01-201-1/+0
| | | | llvm-svn: 148578
* After r147827 and r147902, it's now possible for unallocatable registers to beEvan Cheng2012-01-141-0/+5
| | | | | | | | | | | | | | | | | | | live across BBs before register allocation. This miscompiled 197.parser when a cmp + b are optimized to a cbnz instruction even though the CPSR def is live-in a successor. cbnz r6, LBB89_12 ... LBB89_12: ble LBB89_1 The fix consists of two parts. 1) Teach LiveVariables that some unallocatable registers might be liveouts so don't mark their last use as kill if they are. 2) ARM constantpool island pass shouldn't form cbz / cbnz if the conditional branch does not kill CPSR. rdar://10676853 llvm-svn: 148168
* Consider unknown alignment caused by OptimizeThumb2Instructions().Jakob Stoklund Olesen2012-01-101-4/+25
| | | | | | | | | | | | | | | | | | | | This function runs after all constant islands have been placed, and may shrink some instructions to their 2-byte forms. This can actually cause some constant pool entries to move out of range because of growing alignment padding. Treat instructions that may be shrunk the same as inline asm - they erode the known alignment bits. Also reinstate an old assertion in verify(). It is correct now that basic block offsets include alignments. Add a single large test case that will hopefully exercise many parts of the constant island pass. <rdar://problem/10670199> llvm-svn: 147885
* Accurately model hardware alignment rounding.Jakob Stoklund Olesen2012-01-101-21/+56
| | | | | | | | | | | | | | | | | | | On Thumb, the displacement computation hardware uses the address of the current instruction rouned down to a multiple of 4. Include this rounding in the UserOffset we compute for each instruction. When inline asm is present, the instruction alignment may not be known. Constrain the maximum displacement instead in that case. This makes it possible for CreateNewWater() and OffsetIsInRange() to agree about the valid displacements. When they disagree, infinite looping happens. As always, test cases for this stuff are insane. <rdar://problem/10660175> llvm-svn: 147825
* Catch runaway ARMConstantIslandPass even in -Asserts builds.Jakob Stoklund Olesen2012-01-091-2/+2
| | | | | | | | | The pass is prone to looping, and it is better to crash than loop forever, even in a -Asserts build. <rdar://problem/10660175> llvm-svn: 147806
* Abort AdjustBBOffsetsAfter early when possible.Jakob Stoklund Olesen2012-01-061-2/+10
| | | | llvm-svn: 147685
* Fix off-by-one error in bucket sort.Jakob Stoklund Olesen2011-12-161-1/+1
| | | | | | | | | The bad sorting caused a misaligned basic block when building 176.vpr in ARM mode. <rdar://problem/10594653> llvm-svn: 146767
* Don't adjust for alignment padding in OffsetIsInRange.Jakob Stoklund Olesen2011-12-161-16/+1
| | | | | | | | | | | This adjustment is already included in the block offsets computed by BasicBlockInfo, and adjusting again here can cause the pass to loop. When CreateNewWater splits a basic block, OffsetIsInRange would reject the new CPE on the next pass because of the too conservative alignment adjustment. This caused the block to be split again, and so on. llvm-svn: 146751
* Note ARM constant island alignment in the release notes.Jakob Stoklund Olesen2011-12-161-0/+1
| | | | | | | | The command line option should be removed, but not until the feature has gotten a lot of testing. The ARMConstantIslandPass tends to have subtle bugs that only show up after a while. llvm-svn: 146739
* Enable proper constant island alignment by default.Jakob Stoklund Olesen2011-12-151-1/+1
| | | | | | | The code size increase is tiny (< 0.05%) because so little code uses 16-byte constant pool entries. llvm-svn: 146690
* Consider CPE alignment in CreateNewWater().Jakob Stoklund Olesen2011-12-141-104/+117
| | | | | | | | | | | An aligned constant pool entry may require extra alignment padding where the new water is created. Take that into account when computing offset. Also consider the alignment of other constant pool entries when splitting a basic block. Alignment padding may make it necessary to move the split point higher. llvm-svn: 146609
* Fix speling and 80-col.Jakob Stoklund Olesen2011-12-141-4/+3
| | | | llvm-svn: 146575
* Account for CPE alignment when searching for new water.Jakob Stoklund Olesen2011-12-131-31/+51
| | | | | | | | | | | Constant pool entries with different alignment may cause more alignment padding to be inserted. Compute the amount of padding needed, and try to pick the location that requires the least amount of padding. Also take the extra padding into account when the water is above the use. llvm-svn: 146458
* Add a postOffset() alignment argument.Jakob Stoklund Olesen2011-12-121-14/+15
| | | | | | | This computes the offset of the layout sucessor block, considering its alignment as well. llvm-svn: 146401
* Fix typo.Jakob Stoklund Olesen2011-12-121-1/+1
| | | | llvm-svn: 146400
* Also set the proper alignment on inner islands and the function itself.Jakob Stoklund Olesen2011-12-121-15/+29
| | | | | | | | | Downgrade the alignment of the initial constant island when constant pool entries are moved elsewhere. This is all gated by -arm-align-constant-islands. llvm-svn: 146391
* Make MF a class member instead of passing it around everywhere.Jakob Stoklund Olesen2011-12-121-81/+77
| | | | | | | | Also add an MCP member pointing to the machine constant pool. No functional change intended. llvm-svn: 146382
* Add a -arm-align-constant-islands flag, default off.Jakob Stoklund Olesen2011-12-121-9/+35
| | | | | | | | | | | | Order constant pool entries by descending alignment in the initial island to ensure packing and correct alignment. When the command line flag is set, also align the basic block containing the constant pool entries. This is only a partial implementation of constant island alignment. More to come. llvm-svn: 146375
* Try to align the point where a large basic block is split.Jakob Stoklund Olesen2011-12-101-11/+50
| | | | | | | | | | | | | | | | The split point is picked such that the newly created water has the same alignment as the function. This makes the island suitable for constant pool entries with potentially higher alignment. This also fixes an issue where the basic block was split one instruction too late, causing nonconvergence of the algorithm. <rdar://problem/10550705> There is still an issue with correctly packing differently aligned entries in the island. llvm-svn: 146314
* More debug output formatting.Jakob Stoklund Olesen2011-12-101-9/+20
| | | | llvm-svn: 146313
* User a helper overload for a common pattern.Jakob Stoklund Olesen2011-12-091-8/+11
| | | | llvm-svn: 146270
* Tweak debugging output.Jakob Stoklund Olesen2011-12-091-20/+28
| | | | llvm-svn: 146264
* Drop the HasInlineAsm flag.Jakob Stoklund Olesen2011-12-081-8/+2
| | | | | | | | | | It is not used any more. We are tracking inline assembly misalignments directly through the BBInfo.Unalign and KnownBits fields. A simple conservative size estimate is not good enough since it can cause alignment padding to be underestimated. llvm-svn: 146124
* Simplify offset verification.Jakob Stoklund Olesen2011-12-081-9/+4
| | | | llvm-svn: 146121
* Don't include alignment padding in BBInfo.Size.Jakob Stoklund Olesen2011-12-081-145/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | Compute alignment padding before and after basic blocks dynamically. Heed basic block alignment. This simplifies bookkeeping because we don't have to constantly add and remove padding from BBInfo.Size. It also makes it possible to track the extra known alignment bits we get after a tBR_JTr terminator and when entering an aligned basic block. This makes the ARMConstantIslandPass aware of aligned basic blocks. It is tricky to model block alignment correctly when dealing with inline assembly and tBR_JTr instructions that have variable size. If inline assembly turns out to be smaller than expected, that may cause following alignment padding to be larger than expected. This could cause constant pool entries to move out of range. To avoid that problem, we use the worst case alignment padding following inline assembly. This may cause slightly suboptimal constant island placement in aligned basic blocks following inline assembly. Normal functions should be unaffected. llvm-svn: 146118
* Add bundle aware API for querying instruction properties and switch the codeEvan Cheng2011-12-071-4/+4
| | | | | | | | | | | | | | generator to it. For non-bundle instructions, these behave exactly the same as the MC layer API. For properties like mayLoad / mayStore, look into the bundle and if any of the bundled instructions has the property it would return true. For properties like isPredicable, only return true if *all* of the bundled instructions have the property. For properties like canFoldAsLoad, isCompare, conservatively return false for bundles. llvm-svn: 146026
* Eliminate delta argument from AdjustBBOffsetsAfter.Jakob Stoklund Olesen2011-12-071-24/+15
| | | | | | | | | The block offset can be computed from the previous block. That is more robust than keeping track of a delta. Eliminate one redundant AdjustBBOffsetsAfter call. llvm-svn: 146018
* Compute some alignment information for each basic block.Jakob Stoklund Olesen2011-12-071-14/+48
| | | | | | These fields are not used for anything yet. llvm-svn: 146017
* Move common expression into a method.Jakob Stoklund Olesen2011-12-071-10/+10
| | | | llvm-svn: 146008
* Group BBSizes and BBOffsets into a single vector<BasicBlockInfo>.Jakob Stoklund Olesen2011-12-071-74/+78
| | | | | | No functional change is intended. llvm-svn: 146005
* Revert r145971: "Use conservative size estimate for tBR_JTr."Jakob Stoklund Olesen2011-12-061-1/+23
| | | | | | This caused more offset errors. llvm-svn: 145980
* Use conservative size estimate for tBR_JTr.Jakob Stoklund Olesen2011-12-061-23/+1
| | | | | | | | | | This pseudo-instruction contains a .align directive in its expansion, so the total size may vary by 2 bytes. It is too difficult to accurately keep track of this alignment directive, just use the worst-case size instead. llvm-svn: 145971
* Remove alignment from deserted constant islands.Jakob Stoklund Olesen2011-12-061-0/+3
| | | | | | | | | | | | | | | | ARMConstantIslandPass may sometimes leave empty constant islands behind (it really shouldn't). Remove the alignment from the empty islands so the size calculations are still correct. This should fix the many Thumb1 assembler errors in the nightly test suite. The reduced test case for this problem is way too big. That is to be expected for ARMConstantIslandPass bugs. <rdar://problem/10534709> llvm-svn: 145970
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