| Commit message (Collapse) | Author | Age | Files | Lines |
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llvm-svn: 45871
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Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.
llvm-svn: 45695
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that it is cheap and efficient to get.
Move a variety of predicates from TargetInstrInfo into
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around. Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.
Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.
llvm-svn: 45674
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e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on
switching everything over, so new clients should just start using the
shorter names.
Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(),
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.
llvm-svn: 45464
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Likewise setImmedValue -> setImm
llvm-svn: 45453
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llvm-svn: 45418
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should only effect x86 when using long double. Now
12/16 bytes are output for long double globals (the
exact amount depends on the alignment). This brings
globals in line with the rest of LLVM: the space
reserved for an object is now always the ABI size.
One tricky point is that only 10 bytes should be
output for long double if it is a field in a packed
struct, which is the reason for the additional
argument to EmitGlobalConstant.
llvm-svn: 43688
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following jump tables that it earlier inserted. This
would be OK on other targets but is needed for correctness
only on ARM (constant islands needs to find jump tables).
llvm-svn: 39782
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of size other than 4).
llvm-svn: 39743
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llvm-svn: 38515
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llvm-svn: 38513
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llvm-svn: 37898
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llvm-svn: 37098
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llvm-svn: 37066
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llvm-svn: 36662
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Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.
llvm-svn: 36652
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llvm-svn: 36632
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around islands and jump tables).
llvm-svn: 36573
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llvm-svn: 36513
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llvm-svn: 36504
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BBOffsets and BBSizes when adjusting conditional branches.
llvm-svn: 36372
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llvm-svn: 35635
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llvm-svn: 35602
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- Some code clean up.
llvm-svn: 34783
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member, instead of resetting in every function that uses it.
llvm-svn: 34764
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llvm-svn: 34755
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llvm-svn: 34598
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llvm-svn: 34568
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from README.
When no water available, use end of block if in range. (More to do here.)
llvm-svn: 34563
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llvm-svn: 34523
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llvm-svn: 34109
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llvm-svn: 34105
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- Add debugging info.
llvm-svn: 33811
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llvm-svn: 33789
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llvm-svn: 33788
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llvm-svn: 33762
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- In thumb mode, a new constpool island BB size should be 4 + 2 to
compensate for the potential padding due to alignment requirement.
llvm-svn: 33753
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two bytes padding.
llvm-svn: 33734
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instructions away, i.e. its address is equal to PC.
%r0 = tLDRpci <cp#0>
bx
CONSTPOOL_ENTRY 0 <cp#0>, 4
llvm-svn: 33728
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instruction field, adjust it for PC value (4 for thumb, 8 for arm).
llvm-svn: 33711
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llvm-svn: 33707
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llvm-svn: 33706
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- Islands are inserted right after the user MI since thumb LDR cannot encode
negative offset.
llvm-svn: 33690
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spilled (if it is not already).
- If LR is spilled, use BL to implement far jumps. LR is not used as a GPR
in thumb mode so it can be clobbered if it is properly spilled / restored
in prologue / epilogue.
- If LR is force spilled but no far jump has been emitted, try undo'ing the
spill by:
push lr -> delete
pop pc -> bx lr
llvm-svn: 33650
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llvm-svn: 33644
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llvm-svn: 33568
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unconditional branch following it. Simply invert the condition and swap
destinations if the conditional branch can reach the destination of the
unconditional branch:
beq L1
b L2
=>
bne L2
b L1
llvm-svn: 33548
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llvm-svn: 33537
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is unnecessary when we are fixing up a conditional branch since we will be
adding a unconditional branch to the destination of the original branch.
llvm-svn: 33517
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llvm-svn: 33515
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