| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| * | Refactor LEApcrelJT as a pseudo-instructionlowered to a cannonical ADR | Jim Grosbach | 2010-12-01 | 1 | -0/+2 |
| * | Add correct encodings for STRD and LDRD, including fixup support. Additional... | Owen Anderson | 2010-12-01 | 1 | -0/+2 |
| * | * Add support for encoding t_addrmode_s2 and t_addrmode_s1. They are the same as | Bill Wendling | 2010-11-30 | 1 | -0/+4 |
| * | Add encoding support for Thumb2 PLD and PLI instructions. | Owen Anderson | 2010-11-30 | 1 | -0/+2 |
| * | Add parsing for the Thumb t_addrmode_s4 addressing mode. This can almost | Bill Wendling | 2010-11-30 | 1 | -2/+4 |
| * | Rename BX/BRIND/etc patterns to clarify which is actually the BX instruction | Jim Grosbach | 2010-11-30 | 1 | -4/+4 |
| * | Correct Thumb2 encodings for a much wider range of loads and stores. | Owen Anderson | 2010-11-30 | 1 | -0/+2 |
| * | Fix the encoding of VLD4-dup alignment. | Bob Wilson | 2010-11-30 | 1 | -0/+2 |
| * | Provide Thumb2 encodings for basic loads and stores. | Owen Anderson | 2010-11-29 | 1 | -0/+6 |
| * | Have the getAddrMode3OpValue() function in ARMCodeEmitter.cpp produce the same | Bill Wendling | 2010-11-20 | 1 | -9/+21 |
| * | Minor cleanups to a few llvm_unreachable() calls. | Jim Grosbach | 2010-11-19 | 1 | -6/+2 |
| * | Fix .o emission of ARM movt/movw. MCSymbolRefExpr::VK_ARM_(HI||LO)16 for the ... | Jason W Kim | 2010-11-18 | 1 | -0/+5 |
| * | Clean up LEApcrel instuction(s) a bit. It's not really a Pseudo, so don't mark | Jim Grosbach | 2010-11-17 | 1 | -0/+8 |
| * | Fix comment typo. | Jim Grosbach | 2010-11-17 | 1 | -1/+1 |
| * | The machine instruction no longer encodes the submode as a separate operand. We | Bill Wendling | 2010-11-17 | 1 | -4/+4 |
| * | ARM LDR_PRE/LDR_POST/STR_PRE/STR_POST (and the *B counterparts) binary encoding. | Jim Grosbach | 2010-11-15 | 1 | -0/+4 |
| * | Eliminate ARM::MOVi2pieces. Just use MOVi32imm and expand it to either movi+o... | Evan Cheng | 2010-11-12 | 1 | -5/+5 |
| * | First stab at providing correct Thumb2 encodings, start with adc. | Owen Anderson | 2010-11-12 | 1 | -0/+4 |
| * | Fill out support for Thumb2 encodings of NEON instructions. | Owen Anderson | 2010-11-11 | 1 | -0/+2 |
| * | Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. | Owen Anderson | 2010-11-11 | 1 | -0/+2 |
| * | Add support for Thumb2 encodings of NEON data processing instructions, using ... | Owen Anderson | 2010-11-11 | 1 | -0/+2 |
| * | Encoding of destination fixup for ARM branch and conditional branch | Jim Grosbach | 2010-11-11 | 1 | -0/+2 |
| * | Encoding for ARM LDRSH_POST. | Jim Grosbach | 2010-11-11 | 1 | -0/+2 |
| * | ARM STRH encoding information. | Jim Grosbach | 2010-11-11 | 1 | -0/+2 |
| * | ARM LDM encoding for the mode (ia, ib, da, db) operand. | Jim Grosbach | 2010-11-10 | 1 | -0/+2 |
| * | Add encoder method for ARM load/store shifted register offset operands. | Jim Grosbach | 2010-11-09 | 1 | -0/+2 |
| * | The MC code couldn't handle ARM LDR instructions with negative offsets: | Bill Wendling | 2010-11-03 | 1 | -11/+30 |
| * | Rename getAddrModeImm12OpValue to getAddrModeImmOpValue and expand it to work | Bill Wendling | 2010-11-02 | 1 | -19/+20 |
| * | Rename encoder methods to match naming convention. | Owen Anderson | 2010-11-02 | 1 | -5/+2 |
| * | Add correct NEON encodings for vld2, vld3, and vld4 basic variants. | Owen Anderson | 2010-11-02 | 1 | -0/+3 |
| * | Add correct NEON encodings for the "multiple single elements" form of vld. | Owen Anderson | 2010-11-02 | 1 | -1/+4 |
| * | Encode the register list operands for ARM mode LDM/STM instructions. | Jim Grosbach | 2010-10-30 | 1 | -0/+3 |
| * | 80 column fix. | Jim Grosbach | 2010-10-29 | 1 | -2/+2 |
| * | s/getNEONVcvtImm32/getNEONVcvtImm32OpValue/ to be consistent with other operand | Jim Grosbach | 2010-10-29 | 1 | -1/+1 |
| * | Refactor ARM STR/STRB instruction patterns into STR{B}i12 and STR{B}rs, like | Jim Grosbach | 2010-10-27 | 1 | -2/+3 |
| * | Provide correct encodings for NEON vcvt, which has its own special immediate ... | Owen Anderson | 2010-10-27 | 1 | -0/+2 |
| * | JIT imm12 encoding for constant pool entry references. | Jim Grosbach | 2010-10-27 | 1 | -0/+4 |
| * | ARM JIT fix for LDRi12 and company. | Jim Grosbach | 2010-10-27 | 1 | -4/+17 |
| * | The new LDR* instruction patterns should handle the necessary encoding of | Jim Grosbach | 2010-10-27 | 1 | -0/+7 |
| * | First part of refactoring ARM addrmode2 (load/store) instructions to be more | Jim Grosbach | 2010-10-26 | 1 | -0/+2 |
| * | fix memory-layout assumption which only holds on little-endian systems | Gabor Greif | 2010-10-22 | 1 | -1/+1 |
| * | ARM Binary encoding information for BFC/BFI instructions. | Jim Grosbach | 2010-10-21 | 1 | -0/+2 |
| * | Add encodings for movement between ARM core registers and single-precision | Bill Wendling | 2010-10-20 | 1 | -1/+1 |
| * | ARMCodeEmitter::emitMiscInstruction is dead. Long live | Bill Wendling | 2010-10-15 | 1 | -45/+1 |
| * | ARM mode encoding information for UBFX and SBFX instructions. | Jim Grosbach | 2010-10-15 | 1 | -0/+2 |
| * | Tweak the ARM backend to use the RRX mnemonic instead of the 'mov a, b, rrx' | Jim Grosbach | 2010-10-14 | 1 | -2/+2 |
| * | Add encoding for 'fmstat'. | Bill Wendling | 2010-10-14 | 1 | -4/+0 |
| * | - Add encodings for multiply add/subtract instructions in all their glory. | Bill Wendling | 2010-10-14 | 1 | -9/+1 |
| * | Add ARM mode encoding for [SU]XT[BH] and [SU]XTA[BH] instructions. | Jim Grosbach | 2010-10-13 | 1 | -0/+2 |
| * | Add the rest of the ARM so_reg encoding options (register shifted register) | Jim Grosbach | 2010-10-12 | 1 | -0/+2 |
