| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| * | Rename getAddrModeImm12OpValue to getAddrModeImmOpValue and expand it to work | Bill Wendling | 2010-11-02 | 1 | -19/+20 |
| * | Rename encoder methods to match naming convention. | Owen Anderson | 2010-11-02 | 1 | -5/+2 |
| * | Add correct NEON encodings for vld2, vld3, and vld4 basic variants. | Owen Anderson | 2010-11-02 | 1 | -0/+3 |
| * | Add correct NEON encodings for the "multiple single elements" form of vld. | Owen Anderson | 2010-11-02 | 1 | -1/+4 |
| * | Encode the register list operands for ARM mode LDM/STM instructions. | Jim Grosbach | 2010-10-30 | 1 | -0/+3 |
| * | 80 column fix. | Jim Grosbach | 2010-10-29 | 1 | -2/+2 |
| * | s/getNEONVcvtImm32/getNEONVcvtImm32OpValue/ to be consistent with other operand | Jim Grosbach | 2010-10-29 | 1 | -1/+1 |
| * | Refactor ARM STR/STRB instruction patterns into STR{B}i12 and STR{B}rs, like | Jim Grosbach | 2010-10-27 | 1 | -2/+3 |
| * | Provide correct encodings for NEON vcvt, which has its own special immediate ... | Owen Anderson | 2010-10-27 | 1 | -0/+2 |
| * | JIT imm12 encoding for constant pool entry references. | Jim Grosbach | 2010-10-27 | 1 | -0/+4 |
| * | ARM JIT fix for LDRi12 and company. | Jim Grosbach | 2010-10-27 | 1 | -4/+17 |
| * | The new LDR* instruction patterns should handle the necessary encoding of | Jim Grosbach | 2010-10-27 | 1 | -0/+7 |
| * | First part of refactoring ARM addrmode2 (load/store) instructions to be more | Jim Grosbach | 2010-10-26 | 1 | -0/+2 |
| * | fix memory-layout assumption which only holds on little-endian systems | Gabor Greif | 2010-10-22 | 1 | -1/+1 |
| * | ARM Binary encoding information for BFC/BFI instructions. | Jim Grosbach | 2010-10-21 | 1 | -0/+2 |
| * | Add encodings for movement between ARM core registers and single-precision | Bill Wendling | 2010-10-20 | 1 | -1/+1 |
| * | ARMCodeEmitter::emitMiscInstruction is dead. Long live | Bill Wendling | 2010-10-15 | 1 | -45/+1 |
| * | ARM mode encoding information for UBFX and SBFX instructions. | Jim Grosbach | 2010-10-15 | 1 | -0/+2 |
| * | Tweak the ARM backend to use the RRX mnemonic instead of the 'mov a, b, rrx' | Jim Grosbach | 2010-10-14 | 1 | -2/+2 |
| * | Add encoding for 'fmstat'. | Bill Wendling | 2010-10-14 | 1 | -4/+0 |
| * | - Add encodings for multiply add/subtract instructions in all their glory. | Bill Wendling | 2010-10-14 | 1 | -9/+1 |
| * | Add ARM mode encoding for [SU]XT[BH] and [SU]XTA[BH] instructions. | Jim Grosbach | 2010-10-13 | 1 | -0/+2 |
| * | Add the rest of the ARM so_reg encoding options (register shifted register) | Jim Grosbach | 2010-10-12 | 1 | -0/+2 |
| * | Move the ARM so_imm encoding into a custom operand encoder and remove the | Jim Grosbach | 2010-10-12 | 1 | -0/+2 |
| * | Add custom encoder for the 's' bit denoting whether an ARM arithmetic | Jim Grosbach | 2010-10-12 | 1 | -0/+11 |
| * | Reapply 116059, this time without the fatfingered pasto at the top. | Jim Grosbach | 2010-10-08 | 1 | -13/+17 |
| * | Reverting 116059. Bots are unhappy with it. | Jim Grosbach | 2010-10-08 | 1 | -18/+14 |
| * | 'const'ify getMachineOpValue() and associated helpers. | Jim Grosbach | 2010-10-08 | 1 | -14/+18 |
| * | Make <target>CodeEmitter::getBinaryCodeForInstr() a const method. | Jim Grosbach | 2010-10-08 | 1 | -1/+1 |
| * | move getRegisterNumbering() to out of ARMBaseRegisterInfo into the helper | Jim Grosbach | 2010-09-15 | 1 | -29/+22 |
| * | Refactor uses of getRegisterNumbering() to not need the isSPVFP argument. Check | Jim Grosbach | 2010-09-15 | 1 | -6/+6 |
| * | zap dead code. | Chris Lattner | 2010-09-04 | 1 | -4/+0 |
| * | Change ARM VFP VLDM/VSTM instructions to use addressing mode #4, just like | Bob Wilson | 2010-08-27 | 1 | -2/+2 |
| * | Change ARM PKHTB and PKHBT instructions to use a shift_imm operand to avoid | Bob Wilson | 2010-08-17 | 1 | -0/+5 |
| * | Move the ARM SSAT and USAT optional shift amount operand out of the | Bob Wilson | 2010-08-11 | 1 | -5/+6 |
| * | Add a separate ARM instruction format for Saturate instructions. | Bob Wilson | 2010-08-11 | 1 | -0/+45 |
| * | Reapply r110396, with fixes to appease the Linux buildbot gods. | Owen Anderson | 2010-08-06 | 1 | -1/+1 |
| * | Revert r110396 to fix buildbots. | Owen Anderson | 2010-08-06 | 1 | -1/+1 |
| * | Don't use PassInfo* as a type identifier for passes. Instead, use the addres... | Owen Anderson | 2010-08-05 | 1 | -1/+1 |
| * | ARMv4 JIT forgets to set the lr register when making a indirect function call... | Xerxes Ranby | 2010-07-22 | 1 | -0/+13 |
| * | Rename DBG_LABEL PROLOG_LABEL, because it's only used during prolog emission and | Bill Wendling | 2010-07-16 | 1 | -1/+1 |
| * | Add support for encoding VDUP (ARM core register) instructions. | Bob Wilson | 2010-06-29 | 1 | -0/+17 |
| * | Add support for encoding NEON VMOV (from core register to scalar) instructions. | Bob Wilson | 2010-06-29 | 1 | -6/+19 |
| * | Fix Thumb encoding of VMOV (scalar to ARM core register). The encoding is | Bob Wilson | 2010-06-29 | 1 | -1/+1 |
| * | Make the ARMCodeEmitter identify Thumb functions via ARMFunctionInfo instead | Bob Wilson | 2010-06-28 | 1 | -5/+7 |
| * | Refactor encoding function for NEON 1-register with modified immediate format. | Bob Wilson | 2010-06-28 | 1 | -5/+1 |
| * | Support Thumb mode encoding of NEON instructions. | Bob Wilson | 2010-06-28 | 1 | -0/+15 |
| * | Add support for encoding NEON VMOV (from scalar to core register) instructions. | Bob Wilson | 2010-06-26 | 1 | -0/+33 |
| * | Add support for encoding 3-register NEON instructions, and fix | Bob Wilson | 2010-06-25 | 1 | -3/+36 |
| * | Add support for encoding 2-register NEON instructions. | Bob Wilson | 2010-06-25 | 1 | -3/+25 |
