| Commit message (Expand) | Author | Age | Files | Lines |
| * | [ARM] Support for v4f16 and v8f16 vectors | Sjoerd Meijer | 2018-03-19 | 1 | -8/+8 |
| * | [ARM] Armv8.2-A FP16 code generation (part 1/3) | Sjoerd Meijer | 2018-01-26 | 1 | -1/+2 |
| * | ARM: One more fix for swifterror CSR set | Arnold Schwaighofer | 2017-09-25 | 1 | -0/+4 |
| * | ARM: Use the proper swifterror CSR list on platforms other than darwin | Arnold Schwaighofer | 2017-09-25 | 1 | -0/+3 |
| * | ARM: TLS calling convention doesn't preserve r9 or r12 on Darwin. | Tim Northover | 2017-04-19 | 1 | -3/+3 |
| * | SwiftCC: swifterror register cannot be as the base register | Arnold Schwaighofer | 2017-02-09 | 1 | -14/+14 |
| * | [ARM] Fix registers clobbered by SjLj EH on soft-float targets | Oliver Stannard | 2016-10-11 | 1 | -0/+1 |
| * | ARM: use callee-saved list in the order they're actually saved. | Tim Northover | 2016-05-13 | 1 | -0/+8 |
| * | ARM: Use a callee save register for the swiftself parameter. | Matthias Braun | 2016-04-13 | 1 | -6/+15 |
| * | Swift Calling Convention: swifterror target support. | Manman Ren | 2016-04-11 | 1 | -0/+21 |
| * | Swift Calling Convention: add swiftself attribute. | Manman Ren | 2016-03-29 | 1 | -0/+9 |
| * | [CXX_FAST_TLS] Fix issues in ARM. | Manman Ren | 2016-03-18 | 1 | -2/+3 |
| * | CXX_FAST_TLS calling convention: performance improvement for ARM. | Manman Ren | 2016-01-12 | 1 | -0/+6 |
| * | CXX_FAST_TLS calling convention: Add support for ARM on Darwin. | Manman Ren | 2016-01-11 | 1 | -0/+5 |
| * | ARM: support TLS accesses on Darwin platforms | Tim Northover | 2016-01-07 | 1 | -0/+4 |
| * | ARM: add backend support for the ABI used in WatchOS | Tim Northover | 2015-10-28 | 1 | -0/+2 |
| * | [ARM] Add support for nest attribute using r12 | Renato Golin | 2015-07-12 | 1 | -0/+3 |
| * | ARM: treat [N x i32] and [N x i64] as AAPCS composite types | Tim Northover | 2015-02-24 | 1 | -1/+1 |
| * | ARM: HFAs must be passed in consecutive registers | Oliver Stannard | 2014-05-09 | 1 | -0/+3 |
| * | Remove a special character in comment that accidentially got committed. | Evan Cheng | 2014-03-04 | 1 | -1/+1 |
| * | Tweak ARM fastcc by adopting these two AAPCS rules: | Evan Cheng | 2014-02-11 | 1 | -0/+7 |
| * | LLVM-1163: AAPCS-VFP violation when CPRC allocated to stack | Oliver Stannard | 2014-02-07 | 1 | -4/+5 |
| * | ARM: support interrupt attribute | Tim Northover | 2013-10-01 | 1 | -1/+21 |
| * | Have ARMBaseRegisterInfo::getCallPreservedMask return the 'correct' mask for ... | Stephen Lin | 2013-07-03 | 1 | -6/+0 |
| * | Fix for 5.5 Parameter Passing --> Stage C: | Stepan Dyatkovskiy | 2013-04-22 | 1 | -2/+1 |
| * | Add CodeGen support for functions that always return arguments via a new para... | Stephen Lin | 2013-04-20 | 1 | -0/+11 |
| * | Mark the Int_eh_sjlj_dispatchsetup pseudo instruction as clobbering all | Chad Rosier | 2012-11-06 | 1 | -0/+2 |
| * | ARM: enable struct byval for AAPCS-VFP. | Manman Ren | 2012-08-13 | 1 | -0/+3 |
| * | ARM: enable struct byval for AAPCS. | Manman Ren | 2012-08-10 | 1 | -0/+3 |
| * | Add support for the ARM GHC calling convention, this patch was in 3.0, | Eric Christopher | 2012-08-03 | 1 | -0/+25 |
| * | Remove unused CCIfSubtarget. | Jay Foad | 2012-04-17 | 1 | -4/+0 |
| * | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 2012-02-18 | 1 | -1/+1 |
| * | Implement ARMBaseRegisterInfo::getCallPreservedMask(). | Jakob Stoklund Olesen | 2012-01-17 | 1 | -0/+11 |
| * | Enable support for returning i1, i8, and i16. Nothing special todo as it's the | Chad Rosier | 2011-11-08 | 1 | -0/+2 |
| * | Allow i1 to be promoted to i32 for ARM AAPCS and AAPCS-VFP calling convention... | Chad Rosier | 2011-11-07 | 1 | -1/+1 |
| * | Allow i1 to be promoted to i32 for ARM APCS calling convention. | Chad Rosier | 2011-11-05 | 1 | -1/+1 |
| * | ARM byval support. Will be enabled by another patch to the FE. <rdar://prob... | Stuart Hastings | 2011-04-20 | 1 | -1/+1 |
| * | Support for byval parameters on ARM. Will be enabled by a forthcoming | Stuart Hastings | 2011-02-28 | 1 | -0/+3 |
| * | Add fastcc cc: pass and return VFP / NEON values in registers. Controlled by ... | Evan Cheng | 2010-10-22 | 1 | -0/+29 |
| * | fix emacs language spec's, patch by Edmund Grimley-Evans! | Chris Lattner | 2010-08-17 | 1 | -1/+1 |
| * | Fix eabi calling convention when a 64 bit value shadows r3. | Rafael Espindola | 2010-08-06 | 1 | -1/+1 |
| * | Correctly align double arguments in the stack. | Rafael Espindola | 2009-10-27 | 1 | -0/+1 |
| * | Missed pieces for ARM HardFP ABI. | Anton Korobeynikov | 2009-08-05 | 1 | -0/+2 |
| * | Add support for ARM's Advanced SIMD (NEON) instruction set. | Bob Wilson | 2009-06-22 | 1 | -7/+34 |
| * | Address review comments: add 3 ARM calling conventions. | Anton Korobeynikov | 2009-06-16 | 1 | -27/+0 |
| * | Typo | Anton Korobeynikov | 2009-06-08 | 1 | -1/+1 |
| * | The attached patches implement most of the ARM AAPCS-VFP hard float | Anton Korobeynikov | 2009-06-08 | 1 | -9/+51 |
| * | Fix pr4058 and pr4059. Do not split i64 or double arguments between r3 and | Bob Wilson | 2009-05-19 | 1 | -1/+4 |
| * | Remove unnecessary references to f32 types. After specifying that f32 | Bob Wilson | 2009-04-24 | 1 | -4/+4 |
| * | Clean up formatting, remove trailing whitespace, fix comment typos and | Bob Wilson | 2009-04-17 | 1 | -3/+3 |