summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
Commit message (Collapse)AuthorAgeFilesLines
* ReuseFrameIndexVals is used in multiple files, so it can't be static.Dan Gohman2010-04-151-2/+5
| | | | llvm-svn: 101379
* Fix a bunch of namespace polution.Dan Gohman2010-04-151-1/+1
| | | | llvm-svn: 101376
* Add const qualifiers to CodeGen's use of LLVM IR constructs.Dan Gohman2010-04-151-1/+1
| | | | llvm-svn: 101334
* use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()Chris Lattner2010-04-021-2/+1
| | | | llvm-svn: 100214
* Fix a very bad typo. Since the register number was off by one, the ARMBob Wilson2010-03-201-1/+1
| | | | | | | | load/store optimizer would incorrectly think that registers D26 and D28 were consecutive and would generate a VLDM instruction to load them. The assembler was not convinced. llvm-svn: 99043
* Make sure the LR gets pushed in functions that use vaargs. This fixesJim Grosbach2010-03-101-0/+4
| | | | | | 400.perlbench for the nightly tests. llvm-svn: 98183
* Change the Value argument to eliminateFrameIndex to a type-tagged value. ThisJim Grosbach2010-03-091-2/+5
| | | | | | | | | | is preparatory to having PEI's scavenged frame index value reuse logic properly distinguish types of frame values (e.g., whether the value is stack-pointer relative or frame-pointer relative). No functionality change. llvm-svn: 98086
* scavenged frame index value re-use gets confused when more than one baseJim Grosbach2010-03-091-1/+1
| | | | | | | | register is involved for thumb1. Work around this for the moment by only re-using SP-relative offsets. This is temporary 'til the code can distinguish multiple base registers. llvm-svn: 98071
* pr6478: The frame pointer spill frame index is only defined when there is aBob Wilson2010-03-041-1/+3
| | | | | | frame pointer. llvm-svn: 97755
* Create a stack frame on ARM whenJakob Stoklund Olesen2010-02-241-41/+41
| | | | | | | | | | | - Function uses all scratch registers AND - Function does not use any callee saved registers AND - Stack size is too big to address with immediate offsets. In this case a register must be scavenged to calculate the address of a stack object, and the scavenger needs a spare register or emergency spill slot. llvm-svn: 97071
* Remove an unused variable. Was this intentional?Chandler Carruth2010-02-241-1/+0
| | | | llvm-svn: 97022
* handle very large call frames when require SPAdj != 0 for Thumb1Jim Grosbach2010-02-241-1/+1
| | | | llvm-svn: 97013
* Spelling. s/suppor /support /Jim Grosbach2010-02-231-3/+3
| | | | llvm-svn: 96954
* Updated version of r96634 (which was reverted due to failing 176.gcc andJim Grosbach2010-02-221-0/+10
| | | | | | | | 126.gcc nightly tests. These failures uncovered latent bugs that machine DCE could remove one half of a stack adjust down/up pair, causing PEI to assert. This update fixes that, and the tests now pass. llvm-svn: 96822
* Clean up a bit and fix for when SPAdj != 0Jim Grosbach2010-02-221-3/+2
| | | | llvm-svn: 96818
* The predicate index isn't fixed, so scan for it to make sure we get the properJim Grosbach2010-02-221-2/+3
| | | | | | | | | value. Thumb2 uses the tADJCALLSTACK* instructions, and doesn't need t2 versions, so remove the FIXME entry. llvm-svn: 96817
* Revert 96634. It causes assertion failures for 126.gcc and 176.gcc inBob Wilson2010-02-191-12/+3
| | | | | | the armv6 nightly tests. llvm-svn: 96691
* Radar 7636153. In the presence of large call frames, it's not sufficientJim Grosbach2010-02-191-3/+12
| | | | | | | | | for ARM to just check if a function has a FP to determine if it's safe to simplify the stack adjustment pseudo ops prior to eliminating frame indices. Allow targets to override the default behavior and does so for ARM and Thumb2. llvm-svn: 96634
* Teach MachineFrameInfo to track maximum alignment while stack objects are beingEvan Cheng2010-02-131-8/+0
| | | | | | | | | | created. This ensures it's updated at all time. It means targets which perform dynamic stack alignment would know whether it is required and whether frame pointer register cannot be made available register allocation. This is a fix for rdar://7625239. Sorry, I can't create a reasonably sized test case. llvm-svn: 96069
* As of r79039, we still try to eliminate the frame pointer on leaf functions,Jim Grosbach2010-02-021-1/+1
| | | | | | even when -disable-fp-elim is specified. llvm-svn: 95161
* constify a method argument.Chris Lattner2010-01-261-3/+4
| | | | llvm-svn: 94612
* For aligned load/store instructions, it's only required to know whether aJim Grosbach2010-01-191-0/+8
| | | | | | | | | | | function can support dynamic stack realignment. That's a much easier question to answer at instruction selection stage than whether the function actually will have dynamic alignment prologue. This allows the removal of the stack alignment heuristic pass, and improves code quality for cases where the heuristic would result in dynamic alignment code being generated when it was not strictly necessary. llvm-svn: 93885
* 80 column violationsJim Grosbach2010-01-061-4/+6
| | | | llvm-svn: 92876
* Addressing mode 6 (load/store) instructions can't encode an immediate offsetJim Grosbach2010-01-061-1/+4
| | | | | | for stack references. llvm-svn: 92871
* Use proper move instructions. Make the verifier happy.Jakob Stoklund Olesen2009-12-221-1/+1
| | | | llvm-svn: 91914
* Dynamic stack realignment use of sp register as source/dest registerAnton Korobeynikov2009-12-061-4/+27
| | | | | | | | | | in "bic sp, sp, #15" leads to unpredicatble behaviour in Thumb2 mode. Emit the following code instead: mov r4, sp bic r4, r4, #15 mov sp, r4 llvm-svn: 90724
* Factor the stack alignment calculations out into a target independent pass.Jim Grosbach2009-12-021-63/+2
| | | | | | No functionality change. llvm-svn: 90336
* Move default FrameReg val to getFrameIndexReference(). Otherwise, debug info ↵Jim Grosbach2009-11-221-1/+2
| | | | | | can get bogus values. llvm-svn: 89618
* Generate more correct debug info for frame indices.Jim Grosbach2009-11-221-35/+50
| | | | llvm-svn: 89576
* Revert 89562. We're being sneakier than I was giving us credit for, and thisJim Grosbach2009-11-211-4/+1
| | | | | | isn't necessary. llvm-svn: 89568
* Darwin requires a frame pointer for all non-leaf functions to support correctJim Grosbach2009-11-211-1/+4
| | | | | | backtraces. llvm-svn: 89562
* Make the pass class name more explicit.Jim Grosbach2009-11-161-4/+6
| | | | llvm-svn: 88964
* make pass name a bit more clearJim Grosbach2009-11-161-1/+1
| | | | llvm-svn: 88961
* Detect need for autoalignment of the stack earlier to catch spills moreJim Grosbach2009-11-151-2/+45
| | | | | | | conservatively. eliminateFrameIndex() machinery adjust to handle addr mode 6 (vld1/vst1) used for spills. Fix tests to expect aligned Q-reg spilling llvm-svn: 88874
* Add a bool flag to StackObjects telling whether they reference spillDavid Greene2009-11-121-2/+4
| | | | | | | | | | | | | slots. The AsmPrinter will use this information to determine whether to print a spill/reload comment. Remove default argument values. It's too easy to pass a wrong argument value when multiple arguments have default values. Make everything explicit to trap bugs early. Update all targets to adhere to the new interfaces.. llvm-svn: 87022
* Now that the default is 'enabled,' a separate command line option for ARM isJim Grosbach2009-11-091-8/+1
| | | | | | not necessary. llvm-svn: 86621
* Enable dynamic stack realignment by default.Jim Grosbach2009-11-091-1/+1
| | | | llvm-svn: 86604
* Set dynamic stack realignment to real values.Jim Grosbach2009-11-091-11/+3
| | | | llvm-svn: 86602
* Use Unified Assembly Syntax for the ARM backend.Jim Grosbach2009-11-091-4/+4
| | | | llvm-svn: 86494
* Use aligned load/store instructions for spilling Q registers when we know ↵Jim Grosbach2009-11-081-2/+2
| | | | | | the stack slot is 128 bit aligned llvm-svn: 86425
* Grammar.Jim Grosbach2009-11-041-1/+1
| | | | llvm-svn: 86068
* Now that the memory leak from McCat/08-main has been fixed (86056), re-enableJim Grosbach2009-11-041-3/+9
| | | | | | | aggressive testing of dynamic stack alignment. Note that this is off by default, and enabled for LLCBETA nightly results. llvm-svn: 86064
* If a function has no stack frame at all, dynamic realignment isn't necessary.Jim Grosbach2009-11-041-0/+1
| | | | llvm-svn: 86057
* dynamic stack realignment necessitates scanning the floating point callee-Jim Grosbach2009-11-041-2/+2
| | | | | | saved instructions even if no stack adjustment for those saves is needed. llvm-svn: 86056
* Fix PR5367. QPR_8 is the super regclass of DPR_8 and SPR_8.Evan Cheng2009-11-031-2/+9
| | | | llvm-svn: 85871
* Revert r85049, it is causing PR5367Anton Korobeynikov2009-11-031-0/+2
| | | | llvm-svn: 85847
* Make use of imm12 version of Thumb2 ldr / str instructions more aggressively.Evan Cheng2009-11-011-6/+16
| | | | llvm-svn: 85743
* Dial back the realignment a bit.Jim Grosbach2009-10-301-9/+3
| | | | llvm-svn: 85546
* To get more thorough testing from llc-beta nightly runs, do dynamic stackJim Grosbach2009-10-291-4/+9
| | | | | | realignment regardless of whether it's strictly necessary. llvm-svn: 85476
* Cleanup now that frame index scavenging via post-pass is working for ARM and ↵Jim Grosbach2009-10-281-31/+4
| | | | | | Thumb2. llvm-svn: 85406
OpenPOWER on IntegriCloud