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path: root/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
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* 80 col violation.Evan Cheng2009-07-251-1/+2
| | | | llvm-svn: 77041
* Revert the ConstantInt constructors back to their 2.5 forms where possible, ↵Owen Anderson2009-07-241-2/+1
| | | | | | thanks to contexts-on-types. More to come. llvm-svn: 77011
* FLDD, FLDS, FCPYD, FCPYS, FSTD, FSTS, VMOVD, VMOVQ maps to the same ↵Evan Cheng2009-07-241-3/+3
| | | | | | instructions on all sub-targets. llvm-svn: 76925
* Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index ↵David Goodwin2009-07-241-118/+84
| | | | | | elimination more exactly for Thumb-2 to get better code gen. llvm-svn: 76919
* Fix frame index elimination to correctly handle thumb-2 addressing modes ↵David Goodwin2009-07-231-17/+54
| | | | | | that don't allow negative offsets. During frame elimination convert *i12 opcode to a *i8 when necessary due to a negative offset. llvm-svn: 76883
* 80 col violation.Evan Cheng2009-07-231-2/+4
| | | | llvm-svn: 76872
* Get rid one of the getRegisterNumbering. Also add D16 - D31.Evan Cheng2009-07-221-60/+71
| | | | llvm-svn: 76725
* Get rid of the Pass+Context magic.Owen Anderson2009-07-221-1/+1
| | | | llvm-svn: 76702
* Let callers decide the sub-register index on the def operand of ↵Evan Cheng2009-07-161-2/+3
| | | | | | | | rematerialized instructions. Avoid remat'ing instructions whose def have sub-register indices for now. It's just really really hard to get all the cases right. llvm-svn: 75900
* Move EVER MORE stuff over to LLVMContext.Owen Anderson2009-07-141-1/+4
| | | | llvm-svn: 75703
* llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.Torok Edwin2009-07-141-5/+5
| | | | | | | | | This adds location info for all llvm_unreachable calls (which is a macro now) in !NDEBUG builds. In NDEBUG builds location info and the message is off (it only prints "UREACHABLE executed"). llvm-svn: 75640
* Fix FP elimination code to work for Thumb-2 addrmode AddrModeT2_so. This ↵David Goodwin2009-07-131-3/+7
| | | | | | fixes SingleSource/Benchmarks/Stanford/Queens (among others). llvm-svn: 75513
* assert(0) -> LLVM_UNREACHABLE.Torok Edwin2009-07-111-2/+2
| | | | | | | | | Make llvm_unreachable take an optional string, thus moving the cerr<< out of line. LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for NDEBUG builds. llvm-svn: 75379
* Major changes to Thumb (not Thumb2). Many 16-bit instructions either ↵Evan Cheng2009-07-111-1/+1
| | | | | | | | modifies CPSR when they are outside the IT blocks, or they can predicated when in Thumb2. Move the implicit def of CPSR to an optional def which defaults CPSR. This allows the 's' bit to be toggled dynamically. A side-effect of this change is asm printer is now using unified assembly. There are some minor clean ups and fixes as well. llvm-svn: 75359
* Handle Thumb-2 addressing modes during FP elimination.David Goodwin2009-07-091-0/+13
| | | | llvm-svn: 75158
* Use common code for both ARM and Thumb-2 instruction and register info.David Goodwin2009-07-081-9/+9
| | | | llvm-svn: 75067
* Change how so_imm and t2_so_imm are handled. At instruction selection time, ↵Evan Cheng2009-07-081-10/+7
| | | | | | the immediates are no longer encoded in the imm8 + rot format, that are left as it is. The encoding is now done in ams printing and code emission time instead. llvm-svn: 75048
* Implement changes from Chris's feedback.Torok Edwin2009-07-081-0/+1
| | | | | | Finish converting lib/Target. llvm-svn: 75043
* Generalize opcode selection in ARMBaseRegisterInfo.David Goodwin2009-07-081-23/+30
| | | | llvm-svn: 75036
* Push methods into base class in preparation for sharing.David Goodwin2009-07-081-1/+539
| | | | llvm-svn: 75020
* Start converting to new error handling API.Torok Edwin2009-07-081-4/+3
| | | | | | | cerr+abort -> llvm_report_error assert(0)+abort -> LLVM_UNREACHABLE (assert(0)+llvm_unreachable-> abort() included) llvm-svn: 75018
* Start breaking out common base functionality for register info.David Goodwin2009-07-081-0/+865
llvm-svn: 75016
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