| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Check to make sure that the iterator isn't at the beginning of the basic block | Bill Wendling | 2010-10-09 | 1 | -0/+4 |
| * | Code refactoring. | Evan Cheng | 2010-10-07 | 1 | -104/+144 |
| * | Model operand cycles of vldm / vstm; also fixes scheduling itineraries of vld... | Evan Cheng | 2010-10-07 | 1 | -8/+83 |
| * | Clean up MOVi32imm and t2MOVi32imm pseudo instruction definitions. | Jim Grosbach | 2010-10-06 | 1 | -0/+3 |
| * | - Add TargetInstrInfo::getOperandLatency() to compute operand latencies. This | Evan Cheng | 2010-10-06 | 1 | -0/+161 |
| * | fix MSVC 2010 build. | Michael J. Spencer | 2010-10-05 | 1 | -1/+2 |
| * | Cleanup Whitespace. | Michael J. Spencer | 2010-10-05 | 1 | -11/+11 |
| * | Thread the determination of branch prediction hit rates back through the if-c... | Owen Anderson | 2010-10-01 | 1 | -4/+5 |
| * | Make the spelling of the flags for old-style if-conversion heuristics consist... | Owen Anderson | 2010-10-01 | 1 | -4/+4 |
| * | Temporarily add a flag to make it easier to compare the new-style ARM if | Owen Anderson | 2010-09-30 | 1 | -0/+19 |
| * | improve heuristics to find the 'and' corresponding to 'tst' to also catch opp... | Gabor Greif | 2010-09-29 | 1 | -8/+20 |
| * | Add a subtarget hook for reporting the misprediction penalty. Use this to pro... | Owen Anderson | 2010-09-28 | 1 | -2/+4 |
| * | Part one of switching to using a more sane heuristic for determining if-conve... | Owen Anderson | 2010-09-28 | 1 | -10/+24 |
| * | 80-col fixups. | Eric Christopher | 2010-09-28 | 1 | -1/+2 |
| * | Fix r114632. Return if the only terminator is an unconditional branch after t... | Evan Cheng | 2010-09-23 | 1 | -3/+5 |
| * | If there are multiple unconditional branches terminating a block, eliminate all | Evan Cheng | 2010-09-23 | 1 | -1/+17 |
| * | OptimizeCompareInstr should avoid iterating pass the beginning of the MBB whe... | Evan Cheng | 2010-09-21 | 1 | -1/+6 |
| * | Fix buglet when the TST instruction directly uses the AND result. | Gabor Greif | 2010-09-21 | 1 | -5/+6 |
| * | Move the search for the appropriate AND instruction | Gabor Greif | 2010-09-21 | 1 | -18/+42 |
| * | convert targets to the new MF.getMachineMemOperand interface. | Chris Lattner | 2010-09-21 | 1 | -4/+6 |
| * | Remember VLDMQ. | Jakob Stoklund Olesen | 2010-09-15 | 1 | -0/+9 |
| * | Add missing break. | Jakob Stoklund Olesen | 2010-09-15 | 1 | -0/+1 |
| * | Recognize VST1q64Pseudo and VSTMQ as stack slot stores. | Jakob Stoklund Olesen | 2010-09-15 | 1 | -0/+22 |
| * | Reapply Gabor's 113839, 113840, and 113876 with a fix for a problem | Bob Wilson | 2010-09-15 | 1 | -0/+17 |
| * | the darwin9-powerpc buildbot keeps consistently crashing, | Gabor Greif | 2010-09-15 | 1 | -16/+0 |
| * | Move ARM is{LoadFrom,StoreTo}StackSlot closer to their siblings so they won't be | Jakob Stoklund Olesen | 2010-09-15 | 1 | -78/+64 |
| * | Spelling fix. | Bob Wilson | 2010-09-15 | 1 | -1/+1 |
| * | Use VLD1/VST1 pseudo instructions for loadRegFromStackSlot and | Bob Wilson | 2010-09-15 | 1 | -15/+9 |
| * | an attempt to salvage the darwin9-powerpc buildbot, which could be miscompili... | Gabor Greif | 2010-09-14 | 1 | -1/+2 |
| * | Eliminate a 'tst' that immediately follows an 'and' | Gabor Greif | 2010-09-14 | 1 | -0/+15 |
| * | Rename ConvertToSetZeroFlag to something more general. | Bill Wendling | 2010-09-11 | 1 | -2/+2 |
| * | No need to recompute the SrcReg and CmpValue. | Bill Wendling | 2010-09-10 | 1 | -4/+2 |
| * | Move some of the decision logic for converting an instruction into one that sets | Bill Wendling | 2010-09-10 | 1 | -4/+17 |
| * | Modify the comparison optimizations in the peephole optimizer to update the | Bill Wendling | 2010-09-10 | 1 | -2/+5 |
| * | Add a missing case to duplicateCPV() for LSDA constants. Add a FIXME. rdar://... | Jim Grosbach | 2010-09-10 | 1 | -0/+8 |
| * | Teach if-converter to be more careful with predicating instructions that would | Evan Cheng | 2010-09-10 | 1 | -12/+28 |
| * | For each instruction itinerary class, specify the number of micro-ops each | Evan Cheng | 2010-09-09 | 1 | -0/+63 |
| * | remove obsolete comment | Jim Grosbach | 2010-09-08 | 1 | -1/+0 |
| * | correct spill code to properly determine if dynamic stack realignment is | Jim Grosbach | 2010-09-08 | 1 | -2/+2 |
| * | Change ARM VFP VLDM/VSTM instructions to use addressing mode #4, just like | Bob Wilson | 2010-08-27 | 1 | -6/+6 |
| * | Minor simplification. Gets rid of a needless temporary. | Bill Wendling | 2010-08-18 | 1 | -4/+3 |
| * | Handle ARM compares as well as converting for ARM adds, subs, and thumb2's adds. | Bill Wendling | 2010-08-11 | 1 | -0/+5 |
| * | Turn optimize compares back on with fix. We needed to test that a machine op was | Bill Wendling | 2010-08-10 | 1 | -1/+1 |
| * | Use the "isCompare" machine instruction attribute instead of calling the | Bill Wendling | 2010-08-08 | 1 | -3/+3 |
| * | Add the Optimize Compares pass (disabled by default). | Bill Wendling | 2010-08-06 | 1 | -0/+56 |
| * | Many Thumb2 instructions can reference the full ARM register set (i.e., | Jim Grosbach | 2010-07-30 | 1 | -3/+5 |
| * | prune #includes a little. | Chris Lattner | 2010-07-20 | 1 | -1/+1 |
| * | Remove the isMoveInstr() hook. | Jakob Stoklund Olesen | 2010-07-16 | 1 | -42/+0 |
| * | Rename DBG_LABEL PROLOG_LABEL, because it's only used during prolog emission and | Bill Wendling | 2010-07-16 | 1 | -1/+1 |
| * | RISC architectures get their memory operand folding for free. | Jakob Stoklund Olesen | 2010-07-11 | 1 | -217/+0 |
