Commit message (Collapse) | Author | Age | Files | Lines | |
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* | ADT/Triple: Move a variety of clients to using isOSDarwin() and isOSWindows() | Daniel Dunbar | 2011-04-19 | 1 | -8/+6 |
| | | | | | | predicates. llvm-svn: 129816 | ||||
* | When the architecture is explicitly armv6 or thumbv6, we need to mark the ↵ | Owen Anderson | 2011-04-01 | 1 | -9/+15 |
| | | | | | | object file appropriately. llvm-svn: 128739 | ||||
* | The high bit of a Thumb2 ADR's offset is stored in bit 26, not bit 25. | Owen Anderson | 2011-03-23 | 1 | -1/+1 |
| | | | | | | This fixes 464.h264ref with the integrated assembler. llvm-svn: 128172 | ||||
* | Teach ARM/MC/ELF to handle R_ARM_JUMP24 relocation type for conditional jumps. | Jason W Kim | 2011-02-04 | 1 | -3/+6 |
| | | | | | | | | | | | | | | | | (yes, this is different from R_ARM_CALL) - Adds a new method getARMBranchTargetOpValue() which handles the necessary distinction between the conditional and unconditional br/bl needed for ARM/ELF At least for ARM mode, the needed fixup for conditional versus unconditional br/bl is identical, but the ARM docs and existing ARM tools expect this reloc type... Added a few FIXME's for future naming fixups in ARMInstrInfo.td llvm-svn: 124895 | ||||
* | Completed :lower16: / :upper16: support for movw / movt pairs on Darwin. | Evan Cheng | 2011-01-14 | 1 | -5/+40 |
| | | | | | | | | - Fixed :upper16: fix up routine. It should be shifting down the top 16 bits first. - Added support for Thumb2 :lower16: and :upper16: fix up. - Added :upper16: and :lower16: relocation support to mach-o object writer. llvm-svn: 123424 | ||||
* | 1. Support ELF pcrel relocations for movw/movt: | Jason W Kim | 2011-01-12 | 1 | -1/+5 |
| | | | | | | | | R_ARM_MOVT_PREL and R_ARM_MOVW_PREL_NC. 2. Fix minor bug in ARMAsmPrinter - treat bitfield flag as a bitfield, not an enum. 3. Add support for 3 new elf section types (no-ops) llvm-svn: 123294 | ||||
* | Remove the MCObjectFormat class. | Rafael Espindola | 2010-12-18 | 1 | -12/+0 |
| | | | | llvm-svn: 122147 | ||||
* | Move some data to the TargetWriter. | Rafael Espindola | 2010-12-18 | 1 | -6/+5 |
| | | | | llvm-svn: 122134 | ||||
* | If The ARM WriteNopData() gets an unaligned byte count to pad out, fill in with | Jim Grosbach | 2010-12-17 | 1 | -5/+13 |
| | | | | | | a partial value. rdar://8782954 llvm-svn: 122078 | ||||
* | Handle 2 and 4 byte data blob fixup values for ARM. | Jim Grosbach | 2010-12-17 | 1 | -0/+4 |
| | | | | llvm-svn: 122075 | ||||
* | Stub out explicit MCELFObjectTargetWriter interface. | Rafael Espindola | 2010-12-17 | 1 | -1/+7 |
| | | | | llvm-svn: 122067 | ||||
* | Move createELFObjectWriter to its own header. | Rafael Espindola | 2010-12-17 | 1 | -0/+1 |
| | | | | llvm-svn: 122064 | ||||
* | MC/ARM: Use aggressive symbol folding (important for jump tables, for example). | Daniel Dunbar | 2010-12-17 | 1 | -1/+2 |
| | | | | llvm-svn: 122044 | ||||
* | MC/Target: Remove HasScatteredSymbols target hook variable, which has been | Daniel Dunbar | 2010-12-17 | 1 | -6/+2 |
| | | | | | | superceded and was effectively dead. llvm-svn: 122024 | ||||
* | MC/Mach-O: Lift some MachObjectWriter arguments into the target specific | Daniel Dunbar | 2010-12-16 | 1 | -4/+9 |
| | | | | | | interface. llvm-svn: 121981 | ||||
* | MC/Mach-O: Stub out explicit MCMachObjectTargetWriter interface. | Daniel Dunbar | 2010-12-16 | 1 | -1/+5 |
| | | | | llvm-svn: 121973 | ||||
* | MC/Mach-O: Move createMachObjectWriter into MCMachObjectWriter.h. | Daniel Dunbar | 2010-12-16 | 1 | -0/+1 |
| | | | | llvm-svn: 121971 | ||||
* | MC: Move target specific fixup info descriptors to TargetAsmBackend instead of | Daniel Dunbar | 2010-12-16 | 1 | -0/+40 |
| | | | | | | | the MCCodeEmitter, which seems like a better organization. - Also, cleaned up some magic constants while in the area. llvm-svn: 121953 | ||||
* | Remove fixup_arm_thumb_ldst. The code was never calling the "fixup" stuff for | Bill Wendling | 2010-12-16 | 1 | -4/+0 |
| | | | | | | it. I.e., it was always an immediate value. llvm-svn: 121932 | ||||
* | Add fixups for Thumb LDR/STR instructions. | Bill Wendling | 2010-12-15 | 1 | -0/+4 |
| | | | | llvm-svn: 121858 | ||||
* | Add support for MC-ized encoding of tLEApcrel and tLEApcrelJT. rdar://8755755 | Jim Grosbach | 2010-12-14 | 1 | -0/+3 |
| | | | | llvm-svn: 121798 | ||||
* | Fix a small bug (typo?) in the fixup for Thumb1 CBZ/CBNZ instructions. | Owen Anderson | 2010-12-14 | 1 | -1/+1 |
| | | | | llvm-svn: 121784 | ||||
* | Trailing whitespace | Jim Grosbach | 2010-12-14 | 1 | -6/+6 |
| | | | | llvm-svn: 121769 | ||||
* | Second attempt at make Thumb2 LEAs pseudos. This time, perform the lowering ↵ | Owen Anderson | 2010-12-14 | 1 | -0/+20 |
| | | | | | | | | much later, which makes the entire process cleaner. llvm-svn: 121735 | ||||
* | Revert r121721, which broke buildbots. | Owen Anderson | 2010-12-13 | 1 | -20/+0 |
| | | | | llvm-svn: 121726 | ||||
* | Make Thumb2 LEA-like instruction into pseudos, which map down to ADR. ↵ | Owen Anderson | 2010-12-13 | 1 | -0/+20 |
| | | | | | | | | Provide correct fixups for Thumb2 ADR, which is _of course_ different from ARM ADR fixups, or any other Thumb2 fixup. llvm-svn: 121721 | ||||
* | In Thumb2, direct branches can be encoded as either a "short" conditional ↵ | Owen Anderson | 2010-12-13 | 1 | -2/+24 |
| | | | | | | | | | | branch with a null predicate, or as a "long" direct branch. While the mnemonics are the same, they encode the branch offset differently, and the Darwin assembler appears to prefer the "long" form for direct branches. Thus, in the name of bitwise equivalence, provide encoding and fixup support for it. llvm-svn: 121710 | ||||
* | Use 32-bit types for 32-bit values. | Jim Grosbach | 2010-12-13 | 1 | -3/+3 |
| | | | | llvm-svn: 121709 | ||||
* | Trailing whitespace. | Jim Grosbach | 2010-12-13 | 1 | -8/+8 |
| | | | | llvm-svn: 121708 | ||||
* | Attempt to get Thumb2 branch fixups working properly. | Owen Anderson | 2010-12-10 | 1 | -1/+1 |
| | | | | llvm-svn: 121593 | ||||
* | Fixups for Thumb2 vldr's need to have the effective PC aligned as well. | Owen Anderson | 2010-12-10 | 1 | -2/+2 |
| | | | | llvm-svn: 121587 | ||||
* | Thumb unconditional branch binary encoding. rdar://8754994 | Jim Grosbach | 2010-12-10 | 1 | -0/+4 |
| | | | | llvm-svn: 121496 | ||||
* | Thumb conditional branch binary encodings. rdar://8745367 | Jim Grosbach | 2010-12-10 | 1 | -0/+4 |
| | | | | llvm-svn: 121493 | ||||
* | Use the new IsAligned fixup flag to improve fixup encodings for Thumb2 ↵ | Owen Anderson | 2010-12-09 | 1 | -1/+2 |
| | | | | | | | | branches. This is still not perfect, but it gets many more of them correct than it did previously. llvm-svn: 121414 | ||||
* | Fix an issue in some Thumb fixups, where the effective PC address needs to ↵ | Owen Anderson | 2010-12-09 | 1 | -2/+2 |
| | | | | | | | | | | be 4-byte aligned when calculating the offset. Add a new fixup flag to represent this, and use it for the one fixups that I have a testcase for needing this. It's quite likely that the other Thumb fixups will need this too, and to have their fixup encoding logic adjusted accordingly. llvm-svn: 121408 | ||||
* | Rename CB/CBZ specific fixup accordingly. | Jim Grosbach | 2010-12-09 | 1 | -2/+2 |
| | | | | llvm-svn: 121404 | ||||
* | Fix Thumb2 fixups for ldr. | Owen Anderson | 2010-12-09 | 1 | -4/+17 |
| | | | | llvm-svn: 121350 | ||||
* | Fix typo in Thumb2 branch fixup. | Owen Anderson | 2010-12-09 | 1 | -5/+5 |
| | | | | llvm-svn: 121342 | ||||
* | Attempt to make the bit-twiddling readable resulted in the binary value being | Bill Wendling | 2010-12-09 | 1 | -8/+10 |
| | | | | | | overwritten. llvm-svn: 121337 | ||||
* | The BLX instruction is encoded differently than the BL, because why not? In | Bill Wendling | 2010-12-09 | 1 | -4/+25 |
| | | | | | | | | | | particular, the immediate has 20-bits of value instead of 21. And bit 0 is '0' always. Going through the BL fixup encoding was trashing the "bit 0 is '0'" invariant. Attempt to get the encoding at slightly more correct with this. llvm-svn: 121336 | ||||
* | Fix Thumb2 BCC encoding and fixups. | Owen Anderson | 2010-12-09 | 1 | -0/+16 |
| | | | | llvm-svn: 121329 | ||||
* | Support the "target" encodings for the CB[N]Z instructions. | Bill Wendling | 2010-12-08 | 1 | -0/+8 |
| | | | | llvm-svn: 121308 | ||||
* | Tweak ARM fixup value adjustments for Thumb to better handle the half-word | Jim Grosbach | 2010-12-08 | 1 | -8/+15 |
| | | | | | | ordering of thumb mode. llvm-svn: 121280 | ||||
* | Improve comment. | Owen Anderson | 2010-12-08 | 1 | -1/+2 |
| | | | | llvm-svn: 121272 | ||||
* | Add initializer. | Jim Grosbach | 2010-12-08 | 1 | -1/+1 |
| | | | | llvm-svn: 121262 | ||||
* | Add support for loading from a constant pool. | Bill Wendling | 2010-12-08 | 1 | -2/+9 |
| | | | | llvm-svn: 121226 | ||||
* | Let target asm backends see assembler flags as they go by. Use that to handle | Jim Grosbach | 2010-12-08 | 1 | -5/+28 |
| | | | | | | thumb vs. arm mode differences in WriteNopData(). llvm-svn: 121219 | ||||
* | Simplify the byte reordering logic slightly. | Owen Anderson | 2010-12-08 | 1 | -4/+2 |
| | | | | llvm-svn: 121216 | ||||
* | VLDR fixups need special handling under Thumb. While the encoding is the same, | Owen Anderson | 2010-12-08 | 1 | -0/+12 |
| | | | | | | the order of the bytes in the data stream is flipped around. llvm-svn: 121215 | ||||
* | Cleanup in the Darwin end. No functionality change. | Bill Wendling | 2010-12-07 | 1 | -5/+7 |
| | | | | llvm-svn: 121198 |