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* [AMDGPU] Fix few coding style issues. NFC.Valery Pykhtin2016-06-152-23/+23
| | | | llvm-svn: 272785
* [AMDGPU][llvm-mc] s_getreg/setreg* - hwreg - factor out strings/literals etc.Artem Tamazov2016-05-263-0/+101
| | | | | | | | | | | Hwreg(...) syntax implementation unified with sendmsg(...). Common strings moved to Utils MathExtras.h functionality utilized. Added missing build dependency in Disassembler. Differential Revision: http://reviews.llvm.org/D20381 llvm-svn: 270871
* AMDGPU: Fix getIntegerAttribute type and error messageMatt Arsenault2016-05-122-4/+6
| | | | llvm-svn: 269268
* AMDGPU: allow specifying a workgroup size that needs to fit in a compute unitTom Stellard2016-04-142-0/+5
| | | | | | | | | | | | | | | | | | | Summary: For GL_ARB_compute_shader we need to support workgroup sizes of at least 1024. However, if we want to allow large workgroup sizes, we may need to use less registers, as we have to run more waves per SIMD. This patch adds an attribute to specify the maximum work group size the compiled program needs to support. It defaults, to 256, as that has no wave restrictions. Reducing the number of registers available is done similarly to how the registers were reserved for chips with the sgpr init bug. Reviewers: mareko, arsenm, tstellarAMD, nhaehnle Subscribers: FireBurn, kerberizer, llvm-commits, arsenm Differential Revision: http://reviews.llvm.org/D18340 Patch By: Bas Nieuwenhuizen llvm-svn: 266337
* Make helper functions static. NFC.Benjamin Kramer2016-04-071-14/+10
| | | | llvm-svn: 265653
* AMDGPU: Add a shader calling conventionNicolai Haehnle2016-04-062-5/+19
| | | | | | | | | | | This makes it possible to distinguish between mesa shaders and other kernels even in the presence of compute shaders. Patch By: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Differential Revision: http://reviews.llvm.org/D18559 llvm-svn: 265589
* fix sanitizer-ppc64be-linux failure for r262804Valery Pykhtin2016-03-061-1/+1
| | | | | | | | error: moving a local object in a return statement prevents copy elision [-Werror,-Wpessimizing-move] http://lab.llvm.org:8011/builders/sanitizer-ppc64be-linux/builds/930 llvm-svn: 262805
* [AMDGPU] table-driven parser/printer for amd_kernel_code_t structure fieldsValery Pykhtin2016-03-064-0/+369
| | | | | | Differential Revision: http://reviews.llvm.org/D17150 llvm-svn: 262804
* Revert "[AMDGPU] table-driven parser/printer for amd_kernel_code_t structure ↵Nikolay Haustov2016-03-024-370/+0
| | | | | | | | fields" Build failure with clang. llvm-svn: 262477
* [AMDGPU] table-driven parser/printer for amd_kernel_code_t structure fieldsNikolay Haustov2016-03-024-0/+370
| | | | | | | | | | | | | | | | | | This is going to be used in .hsatext disassembler and can be used in current assembler parser (lit tests passed on parsing). Code using this helpers isn't included in this patch. Benefits: unified approach fast field name lookup on parsing Later I would like to enhance some of the field naming/syntax using this code. Patch by: Valery Pykhtin Differential Revision: http://reviews.llvm.org/D17150 llvm-svn: 262473
* Remove autoconf supportChris Bieneman2016-01-261-16/+0
| | | | | | | | | | | | | | | | Summary: This patch is provided in preparation for removing autoconf on 1/26. The proposal to remove autoconf on 1/26 was discussed on the llvm-dev thread here: http://lists.llvm.org/pipermail/llvm-dev/2016-January/093875.html "I felt a great disturbance in the [build system], as if millions of [makefiles] suddenly cried out in terror and were suddenly silenced. I fear something [amazing] has happened." - Obi Wan Kenobi Reviewers: chandlerc, grosbach, bob.wilson, tstellarAMD, echristo, whitequark Subscribers: chfast, simoncook, emaste, jholewinski, tberghammer, jfb, danalbert, srhines, arsenm, dschuff, jyknight, dsanders, joker.eph, llvm-commits Differential Revision: http://reviews.llvm.org/D16471 llvm-svn: 258861
* AMDGPU/SI: Update ISA version for FIJIChangpeng Fang2016-01-131-0/+3
| | | | llvm-svn: 257666
* AMDGPU/SI: Add new target attribute InitialPSInputAddrMarek Olsak2016-01-132-7/+16
| | | | | | | | | | | | | | | | | | | | | Summary: This allows Mesa to pass initial SPI_PS_INPUT_ADDR to LLVM. The register assigns VGPR locations to PS inputs, while the ENA register determines whether or not they are loaded. Mesa needs to set some inputs as not-movable, so that a pixel shader prolog binary appended at the beginning can assume where some inputs are. v2: Make PSInputAddr private, because there is never enough silly getters and setters for people to read. Reviewers: tstellarAMD, arsenm Subscribers: arsenm Differential Revision: http://reviews.llvm.org/D16030 llvm-svn: 257591
* AMDGPU/SI: Fix encoding for FLAT_SCRATCH registers on VITom Stellard2015-12-212-0/+45
| | | | | | | | | | | | | | | Summary: These register has different encodings on CI and VI, so we add pseudo FLAT_SCRACTH registers to be used before MC, and subtarget specific registers to be used by the MC layer. Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D15661 llvm-svn: 256178
* AMDGPU/SI: Add getShaderType() function to Utils/Tom Stellard2015-12-153-1/+22
| | | | | | | | | | Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D15424 llvm-svn: 255650
* AMDGPU/SI: Emit constant arrays in the .hsrodata_readonly_agent sectionTom Stellard2015-12-032-0/+8
| | | | | | | | | | | | Summary: This is done only when targeting HSA. Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D13807 llvm-svn: 254587
* AMDGPU/SI: Correctly emit agent global segment variables when targeting HSATom Stellard2015-12-022-0/+27
| | | | | | Differential Revision: http://reviews.llvm.org/D14508 llvm-svn: 254540
* AMDGPU/SI: Don't emit group segment global variablesTom Stellard2015-12-022-0/+9
| | | | | | | | | | | | Summary: Only global or readonly segment variables should appear in object files. Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D15111 llvm-svn: 254519
* AMDGPU/SI: Use .hsatext section instead of .text for HSATom Stellard2015-09-253-1/+14
| | | | | | | | | | Reviewers: arsenm, grosbach, rafael Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D12424 llvm-svn: 248619
* AMDGPU/SI: Update amd_kernel_code_t definition and add assembler supportTom Stellard2015-06-262-0/+25
| | | | | | | | | | Reviewers: arsenm Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10772 llvm-svn: 240839
* AMDGPU/SI: Add hsa code object directivesTom Stellard2015-06-265-0/+111
Reviewers: arsenm Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10757 llvm-svn: 240831
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