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path: root/llvm/lib/Target/AMDGPU/SOPInstructions.td
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* AMDGPU: Add VI i16 supportTom Stellard2016-11-101-1/+36
* Revert "AMDGPU: Add VI i16 support"Tom Stellard2016-11-041-36/+1
* AMDGPU: Add VI i16 supportTom Stellard2016-11-031-1/+36
* AMDGPU: Workaround for instruction size with literalsMatt Arsenault2016-11-011-0/+1
* AMDGPU: Fix instruction flags for s_endpgmMatt Arsenault2016-10-281-2/+1
* AMDGPU: Add instruction definitions for VGPR indexingMatt Arsenault2016-10-121-1/+51
* BranchRelaxation: Support expanding unconditional branchesMatt Arsenault2016-10-061-0/+2
* AMDGPU: Partially fix reported code size for some instructionsMatt Arsenault2016-10-061-2/+3
* AMDGPU: Use unsigned compare for eq/neMatt Arsenault2016-09-301-2/+2
* AMDGPU: Use i64 scalar compare instructionsMatt Arsenault2016-09-171-0/+12
* AMDGPU: Use SOPK compare instructionsMatt Arsenault2016-09-161-23/+37
* Revert "AMDGPU: Use SOPK compare instructions"Matt Arsenault2016-09-141-37/+23
* AMDGPU: Use SOPK compare instructionsMatt Arsenault2016-09-141-23/+37
* AMDGPU] Assembler: better support for immediate literals in assembler.Sam Kolton2016-09-091-15/+15
* AMDGPU: Make some scalar instructions commutableMatt Arsenault2016-09-071-2/+9
* AMDGPU/SI: Teach SIInstrInfo::FoldImmediate() to fold immediates into copiesTom Stellard2016-09-061-1/+2
* [AMDGPU] Refactor SOP instructions TD files.Valery Pykhtin2016-08-301-0/+1103
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