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path: root/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
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* AMDGPU: Add MachineInstr overloads for instruction format testsMatt Arsenault2015-10-201-2/+1
| | | | llvm-svn: 250797
* AMDGPU: Simplify debug printingMatt Arsenault2015-09-101-1/+1
| | | | llvm-svn: 247345
* AMDGPU/SI: Remove VCCRegMatt Arsenault2015-08-081-2/+11
| | | | llvm-svn: 244380
* AMDGPU/SI: Remove source uses of VCCRegMatt Arsenault2015-08-081-11/+32
| | | | llvm-svn: 244379
* AMDGPU/SI: Add support for shrinking v_cndmask_b32_e32 instructionsTom Stellard2015-07-141-6/+27
| | | | | | | | | | Reviewers: arsenm Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11061 llvm-svn: 242146
* AMDGPU/SI: Select mad patterns to v_mac_f32Tom Stellard2015-07-131-2/+14
| | | | | | | | | The two-address instruction pass will convert these back to v_mad_f32 if necessary. Differential Revision: http://reviews.llvm.org/D11060 llvm-svn: 242038
* AMDGPU/SI: The SIShrinkInstructions pass should only fold immediates with ↵Tom Stellard2015-07-091-1/+1
| | | | | | | | | one use This is convered by existing testcases and will be exposed by a future commit. llvm-svn: 241817
* R600 -> AMDGPU renameTom Stellard2015-06-131-0/+272
llvm-svn: 239657
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