bcm5719-llvm - Project Ortega BCM5719 LLVM

	Commit message (Collapse)	Author	Age	Files	Lines
*	AMDGPU: Fix use-after-free in SIOptimizeExecMasking	Nicolai Haehnle	2016-10-07	1	-1/+4
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Summary: There was a bug with sequences like s_mov_b64 s[0:1], exec s_and_b64 s[2:3]<def>, s[0:1], s[2:3]<kill> ... s_mov_b64_term exec, s[2:3] because s[2:3] was defined and used in the same instruction, ending up with SaveExecInst inside OtherUseInsts. Note that the test case also exposes an unrelated bug. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98028 Reviewers: tstellarAMD, arsenm Subscribers: kzhuravl, wdng, yaxunl, llvm-commits, tony-tye Differential Revision: https://reviews.llvm.org/D25306 llvm-svn: 283528
*	[AMDGPU] Remove unused variables from SIOptimizeExecMasking	Konstantin Zhuravlyov	2016-10-03	1	-3/+0
\| \| \| \| \| \|	Differential Revision: https://reviews.llvm.org/D25110 llvm-svn: 283087
*	Use StringRef in Pass/PassManager APIs (NFC)	Mehdi Amini	2016-10-01	1	-1/+1
\| \| \| \|	llvm-svn: 283004
*	AMDGPU: Partially fix control flow at -O0	Matt Arsenault	2016-09-29	1	-0/+304
	Fixes to allow spilling all registers at the end of the block work with exec modifications. Don't emit s_and_saveexec_b64 for if lowering, and instead emit copies. Mark control flow mask instructions as terminators to get correct spill code placement with fast regalloc, and then have a separate optimization pass form the saveexec. This should work if SGPRs are spilled to VGPRs, but will likely fail in the case that an SGPR spills to memory and no workitem takes a divergent branch. llvm-svn: 282667